SLVS848D July   2009  – October 2015 TPS62620 , TPS62621 , TPS62622 , TPS62623 , TPS62624 , TPS62625

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Mode Selection
      2. 8.3.2 Enable
      3. 8.3.3 Undervoltage Lockout
      4. 8.3.4 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Soft Start
      2. 8.4.2 Switching Frequency
      3. 8.4.3 Power-Save Mode
      4. 8.4.4 Output Capacitor Discharge (TPS62624 Only)
      5. 8.4.5 Short-Circuit Protection
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
        4. 9.2.2.4 Checking Loop Stability
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Information
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Package Summary
    2. 13.2 Chip Scale Package Dimensions

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ

8 Detailed Description

8.1 Overview

The TPS6262x synchronous step-down DC/DC converters typically operate at a regulated 6-MHz frequency pulse width modulation (PWM) mode at moderate to heavy load currents. At light load currents, the TPS6262x converters operate in power-save mode with pulse frequency modulation (PFM).

The converters use a unique frequency locked ring oscillating modulator to achieve best-in-class load and line response and allows the use of tiny inductors and small ceramic input and output capacitors. At the beginning of each switching cycle, the P-channel MOSFET switch is turned on and the inductor current ramps up rising the output voltage until the main comparator trips, then the control logic turns off the switch.

One key advantage of the non-linear architecture is that there is no traditional feed-back loop. The loop response to change in VOUT is essentially instantaneous, which explains the transient response. The absence of a traditional, high-gain compensated linear loop means that the TPS6262x converters are inherently stable over a range of L and COUT.

Although this type of operation normally results in a switching frequency that varies with input voltage and load current, an internal frequency lock loop (FLL) holds the switching frequency constant over a large range of operating conditions.

Combined with best in class load and line transient response characteristics, the low quiescent current of the device (ca. 31 μA) allows to maintain high efficiency at light load, while preserving fast transient response for applications requiring tight output regulation.

8.2 Functional Block Diagram

TPS62620 TPS62621 TPS62622 TPS62623 TPS62624 TPS62625 fblkd_lvs678.gif

8.3 Feature Description

8.3.1 Mode Selection

The MODE pin allows to select the operating mode of the device. Connecting this pin to GND enables the automatic PWM and power-save mode operation. The converter operates in regulated frequency PWM mode at moderate to heavy loads and in the PFM mode during light loads, which maintains high efficiency over a wide load current range.

Pulling the MODE pin high forces the converter to operate in the PWM mode even at light load currents. The advantage is that the converter operates with a fixed frequency that allows simple filtering of the switching frequency for noise-sensitive applications. In this mode, the efficiency is lower compared to the power-save mode during light loads.

For additional flexibility, it is possible to switch from power-save mode to forced PWM mode during operation. This allows efficient power management by adjusting the operation of the converter to the specific system requirements.

8.3.2 Enable

The device starts operation when EN is set high and starts up with the soft start. For proper operation, the EN pin must be terminated and must not be left floating.

Pulling the EN pin low forces the device into shutdown, with a shutdown quiescent current of typically 0.1 μA. In this mode, the P- and N-channel MOSFETs are turned off, the internal resistor feedback divider is disconnected, and the entire internal-control circuitry is switched off.

8.3.3 Undervoltage Lockout

The undervoltage lockout circuit prevents the device from misoperation at low input voltages. It prevents the converter from turning on the switch or rectifier MOSFET under undefined conditions. The TPS6262x devices have a UVLO threshold set to 2.05 V (typical). Fully functional operation is permitted down to 2.1 V input voltage.

8.3.4 Thermal Shutdown

As soon as the junction temperature, TJ, exceeds typically 140°C, the device goes into thermal shutdown. In this mode, the P- and N-channel MOSFETs are turned off. The device continues its operation when the junction temperature again falls below typically 130°C.

8.4 Device Functional Modes

8.4.1 Soft Start

The TPS6262x devices have an internal soft-start circuit that limits the inrush current during start-up. This limits input voltage drops when a battery or a high-impedance power source is connected to the input of the converter.

The soft-start system progressively increases the on-time from a minimum pulse-width of 35 ns as a function of the output voltage. This mode of operation continues for ca. 100 μs after enable. Should the output voltage not have reached its target value by this time, such as in the case of heavy load, the soft-start transitions to a second mode of operation.

The converter then operates in a current limit mode, specifically the P-MOS current limit is set to half the nominal limit, and the N-channel MOSFET remains on until the inductor current has reset. After a further 100 μs, the device ramps up to the full current limit operation if the output voltage has risen above 0.5 V (approximately). Therefore, the start-up time mainly depends on the output capacitor and load current.

8.4.2 Switching Frequency

The magnitude of the internal ramp, which is generated from the duty cycle, reduces for duty cycles either set of 50%. Thus, there is less overdrive on the main comparator inputs which tends to slow the conversion down. The intrinsic maximum operating frequency of the converter is about 10 MHz to 12 MHz, which is controlled to circa 6 MHz by a frequency locked loop.

When high or low duty cycles are encountered, the loop runs out of range and the conversion frequency falls below 6 MHz. The tendency is for the converter to operate more towards a "constant inductor peak current" rather than a "constant frequency". In addition to this behavior which is observed at high duty cycles, it is also noted at low duty cycles.

When the converter is required to operate towards the 6 MHz nominal at extreme duty cycles, the application can be assisted by decreasing the ratio of inductance (L) to the output capacitor's equivalent serial inductance (ESL). This increases the ESL step seen at the main comparator's feed-back input thus decreasing its propagation delay, hence increasing the switching frequency.

8.4.3 Power-Save Mode

If the load current decreases, the converter will enter power save mode operation automatically. During power-save mode the converter operates in discontinuous current (DCM) single-pulse PFM mode, which produces low output ripple compared with other PFM architectures.

When in power save mode, the converter resumes its operation when the output voltage trips below the nominal voltage. It ramps up the output voltage with a minimum of one pulse and goes into power-save mode when the inductor current has returned to a zero steady state. The PFM on-time varies inversely proportional to the input voltage and proportional to the output voltage giving the regulated switching frequency when in steady-state.

PFM mode is left and PWM operation is entered as the output current can no longer be supported in PFM mode. As a consequence, the DC output voltage is typically positioned ca. 0.5% above the nominal output voltage and the transition between PFM and PWM is seamless.

TPS62620 TPS62621 TPS62622 TPS62623 TPS62624 TPS62625 psmt_lvs848.gif Figure 4. Operation in PFM Mode and Transfer to PWM Mode

8.4.4 Output Capacitor Discharge (TPS62624 Only)

The TPS62624 device can actively discharge the output capacitor when it turns off. The integrated discharge resistor has a typical resistance of 15 Ω. The required time to discharge the output capacitor at the output node depends on load current and the output capacitance value. All the other voltage options do not have the output capacitor discharge function enabled.

8.4.5 Short-Circuit Protection

The TPS6262x devices integrate a P-channel MOSFET current limit to protect the device against heavy load or short circuits. When the current in the P-channel MOSFET reaches its current limit, the P-channel MOSFET is turned off and the N-channel MOSFET is turned on. The regulator continues to limit the current on a cycle-by-cycle basis.

As soon as the output voltage falls below ca. 0.4 V, the converter current limit is reduced to half of the nominal value. Because the short-circuit protection is enabled during start-up, the device does not deliver more than half of its nominal current limit until the output voltage exceeds approximately 0.5 V. This needs to be considered when a load acting as a current sink is connected to the output of the converter.