Table 1. List of Components

10.2.2.1 Output Filter Design (Inductor and Output Capacitor)

The TPS62730 is optimized to operate with effective inductance values in the range of 1.5 μH to 3 μH and with effective output capacitance in the range of 1.0 μF to 10 μF. The internal compensation is optimized to operate with an output filter of L = 2.2 μH and C_OUT = 2.2 μF, which gives and LC output filter corner frequency of:

Equation 3.

10.2.2.2 Inductor Selection

The inductor value affects its peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage ripple and the efficiency. The selected inductor must be rated for its DC resistance and saturation current. The inductor ripple current (ΔI_L) decreases with higher inductance and increases with higher V_IN or V_OUT. Equation 4 calculates the maximum inductor current under static load conditions. The saturation current of the inductor should be rated higher than the maximum inductor current as calculated with Equation 5.

Equation 4.

where

• f = Switching Frequency
• L = Inductor Value
• ΔI_L= Peak-to-Peak inductor ripple current

Equation 5.

where

• ΔI_L= Peak-to-Peak inductor ripple current
• I_Lmax = Maximum Inductor current

In high-frequency converter applications, the efficiency is essentially affected by the inductor AC resistance (that is, quality factor) and to a smaller extent by the inductor DCR value. To achieve high efficiency operation, care should be taken in selecting inductors featuring a quality factor above 25 at the switching frequency. Increasing the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor size, increased inductance usually results in an inductor with lower saturation current.

The total losses of the coil consist of both the losses in the DC resistance, R_(DC), and the following frequency-dependent components:

• The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
• Additional losses in the conductor from the skin effect (current displacement at high frequencies)
• Magnetic field losses of the neighboring windings (proximity effect)
• Radiation losses

The following inductor series from different suppliers have been used with the TPS62730 converters.

10.2.2.3 DC-DC Output Capacitor Selection

The DCS-Control scheme of the TPS62730 allows the use of tiny ceramic capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies. At light load currents the converter operate in power save mode and the output voltage ripple is dependent on the output capacitor value and the PFM peak inductor current.

10.2.2.4 Additional Decoupling Capacitors

In addition to the output capacitor there are further decoupling capacitors connected to the output of the TPS62730. These decoupling capacitor are placed closely at the RF transmitter or micro controller. The total capacitance of these decoupling capacitors should be kept to a minimum and should not exceed the values given in the reference designs, see Figure 31 and Figure 32. During mode transition from DC-DC operation to bypass mode the capacitors on the output VOUT are charged up to the battery voltage VIN through the internal bypass switch. During mode transition from bypass mode to DC-DC operation, these capacitors must be discharged by the system supply current to the nominal output voltage threshold until the DC-DC converter will kick in. The charge change in the output and decoupling capacitors can be calculated according to Equation 6. The energy loss due to charge and discharge of the output and decoupling capacitors can be calculated according to Equation 7.

Equation 6.

where

• dQ_{COUT_CDEC} : Charge change needed to charge up and discharge the output and decoupling capacitors from VOUT_DC_DC to V_IN and vice versa
• C_{COUT_CDEC}: Total capacitance on the VOUT pin of the device, includes output and decoupling capacitors
• V_IN: Input (battery) voltage
• V_{OUT_DC_DC}: nominal DC-DC output voltage V_OUT

Equation 7.

where

• C_{COUT_CDEC}: Total capacitance on the VOUT pin of the device, includes output and decoupling capacitors
• V_IN: Input (battery) voltage
• V_{OUT_DC_DC}: nominal DC-DC output voltage V_OUT

10.2.2.5 Input Capacitor Selection

Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is required for best input voltage filtering to ensure proper function of the device and to minimize input voltage spikes. For most applications a 2.2 µF to 4.7 µF ceramic capacitor is recommended. The input capacitor can be increased without any limit for better input voltage filtering.

Table 3 shows a list of tested input/output capacitors.

10.2.2.6 Checking Loop Stability

The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals:

• Switching node, SW
• Inductor current, I_L
• Output ripple voltage, V_OUT(AC)

Basic signals must be measured when evaluating a switching converter. When the switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the regulation loop may be unstable. This is often a result of board layout and/or L-C combination.

As a next step in the evaluation of the regulation loop, the load transient response is tested. The time between the application of the load transient and the turn on of the High Side MOSFET, the output capacitor must supply all of the current required by the load. V_OUT immediately shifts by an amount equal to ΔI_(LOAD) x ESR, where ESR is the effective series resistance of C_OUT. ΔI_(LOAD) begins to charge or discharge C_O generating a feedback error signal used by the regulator to return V_OUT to its steady-state value. The results are most easily interpreted when the device operates in PWM mode.

During this recovery time, V_OUT can be monitored for settling time, overshoot or ringing that helps judge the converter’s stability. Without any ringing, the loop has usually more than 45° of phase margin.

Because the damping factor of the circuitry is directly related to several resistive parameters (for example, MOSFET r_DS(on)) that are temperature dependant, the loop stability analysis must be done over the input voltage range, load current range, and temperature range.