JAJSOK1 October   2024 TPS62810-EP , TPS62811-EP , TPS62812-EP , TPS62813-EP

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Schematic
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Precise Enable
      2. 8.3.2 COMP/FSET
      3. 8.3.3 MODE/SYNC
      4. 8.3.4 Spread Spectrum Clocking (SSC)
      5. 8.3.5 Undervoltage Lockout (UVLO)
      6. 8.3.6 Power-Good Output (PG)
      7. 8.3.7 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pulse Width Modulation (PWM) Operation
      2. 8.4.2 Power Save Mode Operation (PWM/PFM)
      3. 8.4.3 100% Duty-Cycle Operation
      4. 8.4.4 Current Limit and Short-Circuit Protection
      5. 8.4.5 Foldback Current Limit and Short-Circuit Protection
      6. 8.4.6 Output Discharge
      7. 8.4.7 Soft Start/Tracking (SS/TR)
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Programming the Output Voltage
      2. 9.1.2 Inductor Selection
      3. 9.1.3 Capacitor Selection
        1. 9.1.3.1 Input Capacitor
        2. 9.1.3.2 Output Capacitor
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Voltage Tracking
      2. 9.3.2 Synchronizing to an External Clock
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.3.1 Voltage Tracking

The TPS6281x-EP device follows the voltage applied to the SS/TR pin. A voltage ramp on SS/TR to 0.6V ramps the output voltage according to the 0.6V feedback voltage.

Tracking the 3.3V of device 1, such that both rails reach the target voltage at the same time, requires a resistor divider on SS/TR of device 2 equal to the output voltage divider of device 1. The output current of 2.5µA on the SS/TR pin causes an offset voltage on the resistor divider formed by R5 and R6. The equivalent resistance of R5 // R6, so must be kept below 15kΩ. The current from SS/TR causes a slightly higher voltage across R6 than 0.6V, which is desired because device 2 switches to the internal reference as soon as the voltage at SS/TR is higher than 0.6V.

In case both devices need to run in forced PWM mode, TI recommends to tie the MODE pin of device 2 to the output voltage or the power good signal of device 1, the main device. The TPS6281x-EP device has a duty cycle limitation defined by the minimum on time. For tracking down to low output voltages, device 2 cannot follow once the minimum duty cycle is reached. Enabling PFM mode while tracking is in progress allows the user to ramp down the output voltage close to 0V.

TPS62810-EP TPS62811-EP TPS62812-EP TPS62813-EP Schematic for Output Voltage Tracking Figure 9-57 Schematic for Output Voltage Tracking
TPS62810-EP TPS62811-EP TPS62812-EP TPS62813-EP Scope Plot for Output Voltage TrackingFigure 9-58 Scope Plot for Output Voltage Tracking