JAJSOL4C May 2022 – October 2023 TPS62870-Q1 , TPS62871-Q1 , TPS62872-Q1 , TPS62873-Q1
PRODUCTION DATA
If the user changes the output voltage setpoint while the DC/DC converter is operating, the device ramps up or down to the new voltage setting in a controlled way.
The VRAMP[1:0] bits in the CONTROL1 register sets the slew rate when the device ramps from one voltage to another during DVS (see Table 9-6).
VRAMP[1:0] | DVS Slew Rate |
---|---|
0b00 | 10 mV/μs (0.5 μs/step) |
0b01 | 5 mV/μs (1 μs/step) |
0b10 | 1.25 mV/μs (5 μs/step) |
0b11 | 0.5 mV/μs (10 μs/step) |
Note that ramping the output to a higher voltage requires additional output current, so that during DVS, the converter must generate a total output current given by:
where
For correct operation, ensure that the total output current during DVS does not exceed the current limit of the device.