JAJSJH9C April 2023 – October 2024 TPS62874-Q1 , TPS62875-Q1 , TPS62876-Q1 , TPS62877-Q1
PRODMIX
Connect multiple TPS6287x-Q1 devices in parallel in what is known as a "stack"; for example, to increase output current capability or reduce device junction temperature. A stack comprises one primary device and one or more secondary devices. During initialization, each device monitors the SYNCOUT pin to determine if it must operate as a primary device or a secondary device:
Figure 8-16 shows the recommended interconnections in a stack of two TPS6287x-Q1 devices.
CONTROL2:SYNC_OUT_PHASE = 1 sets a phase shift of 180° from the primary to the first secondary device. Please see the DEVICE OPTIONS table for the complete list of available OTP spins.
In a stacked configuration, the common enable signal also acts as a SYSTEM_READY signal (see Section 8.3.4). Each device in the stack can pull the EN pin low during device start-up or when a fault occurs. Thus, the stack is only enabled when all devices have completed the start-up sequence and are fault-free. A fault in any one device disables the whole stack for as long as the fault condition exists.
During start-up, the primary device pulls the COMP pin low for as long as the enable signal (SYSTEM_READY) is low. When the enable signal goes high, the primary device actively controls the COMP pin and all devices in the stack follow the COMP voltage. During start-up, each device in the stack pulls the PG pin low while the pin initializes. When initialization is complete, each secondary device in the stack sets the PG pin to a high impedance and the primary device alone controls the state of the PG signal. The PG pin goes high when the stack has completed the start-up ramp and the output voltage is within specification. The secondary devices in the stack detect the rising edge of the power-good signal and switch from DCM operation to CCM operation. After the stack has successfully started up, the primary device controls the power-good signal in the normal way. In a stacked configuration, there are some faults that only affect individual devices, and other faults that affect all devices. For example, if one device enters current limit, only that device is affected. But a thermal shutdown or undervoltage lockout event in one device disables all devices through the shared enable (SYSTEM_READY) signal.
Some device features are not available during stacked operation, or are only available in the primary converter. Table 8-8 summarizes the available functionality during stacked operation.
Function | Primary Device | Secondary Device | Remark |
---|---|---|---|
UVLO | Yes | Yes | Common enable signal |
OVLO | Yes | Yes | Common enable signal |
OCP – Current Limit | Yes | Yes | Individual |
OCP – Hiccup OCP | No | No | Do not use during stacked operation |
Thermal Shutdown | Yes | Yes | Common enable signal |
Power-Good (Window Comparator) | Yes | No | Primary device only |
I2C Interface | Yes | No | Primary device only |
DVS | Via I2C | No | Voltage loop controlled by primary device only |
SSC | Via I2C | No | Daisy-chained from primary device to secondary devices |
SYNC | Yes | Yes | Synchronization clock applied to primary device |
Precise Enable | No | No | Only binary enable |
Output Discharge | Yes | Yes | Always enabled in secondary devices |
In a stacked configuration, there are some faults that only affect individual devices, and other faults that affect all devices. For example, if one device enters current limit, only that device is affected. But a thermal shutdown or undervoltage lockout event in one device disables all devices via the shared enable (SYSTEM_READY) signal. Table 8-9 summarizes the fault handling of the TPS6287x-Q1 devices during stacked operation.
Fault Condition | Device Response | System Response |
---|---|---|
UVLO | Enable signal pulled low | New soft start |
OVLO | ||
Thermal Shutdown | ||
Current Limit | Enable signal remains high | Error amplifier clamped |
External CLK applied to MODE/SYNC fails | SYNC_OUT and power-stage switch to internal oscillator | System active but switching frequency is not synchronized if clk to a secondary device fails |