JAJSJH9C
April 2023 – October 2024
TPS62874-Q1
,
TPS62875-Q1
,
TPS62876-Q1
,
TPS62877-Q1
PRODMIX
1
1
特長
2
アプリケーション
3
概要
4
Device Options
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings - Q100
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
I2C Interface Timing Characteristics
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Fixed-Frequency DCS-Control Topology
8.3.2
Forced-PWM and Power-Save Modes
8.3.3
Transient Non-Synchronous Mode (optional)
8.3.4
Precise Enable
8.3.5
Start-Up
8.3.6
Switching Frequency Selection
8.3.7
Output Voltage Setting
8.3.7.1
Output Voltage Range
8.3.7.2
Output Voltage Setpoint
8.3.7.3
Non-Default Output Voltage Setpoint
8.3.7.4
Dynamic Voltage Scaling
8.3.7.5
Droop Compensation
8.3.8
Compensation (COMP)
8.3.9
Mode Selection / Clock Synchronization (MODE/SYNC)
8.3.10
Spread Spectrum Clocking (SSC)
8.3.11
Output Discharge
8.3.12
Undervoltage Lockout (UVLO)
8.3.13
Overvoltage Lockout (OVLO)
8.3.14
Overcurrent Protection
8.3.14.1
Cycle-by-Cycle Current Limiting
8.3.14.2
Hiccup Mode
8.3.14.3
Current-Limit Mode
8.3.15
Power Good (PG)
8.3.15.1
Standalone, Primary Device Behavior
8.3.15.2
Secondary Device Behavior
8.3.16
Remote Sense
8.3.17
Thermal Warning and Shutdown
8.3.18
Stacked Operation
8.4
Device Functional Modes
8.4.1
Power-On Reset
8.4.2
Undervoltage Lockout
8.4.3
Standby
8.4.4
On
8.5
Programming
8.5.1
Serial Interface Description
8.5.2
Standard-, Fast-, Fast-Mode Plus Protocol
8.5.3
HS-Mode Protocol
8.5.4
I2C Update Sequence
8.5.5
I2C Register Reset
8.5.6
Dynamic Voltage Scaling (DVS)
9
Device Registers
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Inductor Selection
10.2.2.2
Selecting the Input Capacitors
10.2.2.3
Selecting the Compensation Resistor
10.2.2.4
Selecting the Output Capacitors
10.2.2.5
Selecting the Compensation Capacitor CC
10.2.2.6
Selecting the Compensation Capacitor CC2
10.2.3
Application Curves
10.3
Typical Application Using Two TPS62876-Q1 in a Stacked Configuration
10.3.1
Design Requirements For Two Stacked Devices
10.3.2
Detailed Design Procedure
10.3.2.1
Selecting the Compensation Resistor
10.3.2.2
Selecting the Output Capacitors
10.3.2.3
Selecting the Compensation Capacitor CC
10.3.3
Application Curves for Two Stacked Devices
10.4
Typical Application Using Three TPS62876-Q1 in a Stacked Configuration
10.4.1
Design Requirements For Three Stacked Devices
10.4.2
Detailed Design Procedure
10.4.2.1
Selecting the Compensation Resistor
10.4.2.2
Selecting the Output Capacitors
10.4.2.3
Selecting the Compensation Capacitor CC
10.4.3
Application Curves for Three Stacked Devices
10.5
Best Design Practices
10.6
Power Supply Recommendations
10.7
Layout
10.7.1
Layout Guidelines
10.7.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
ドキュメントの更新通知を受け取る方法
11.3
サポート・リソース
11.4
Trademarks
11.5
静電気放電に関する注意事項
11.6
用語集
12
Revision History
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RZV|24
MPQF690A
サーマルパッド・メカニカル・データ
発注情報
jajsjh9c_oa
jajsjh9c_pm
10.3
Typical Application Using Two
TPS62876
-Q1
in a Stacked Configuration
Figure 10-20
Stacking Two Devices