JAJSMG2C November   2023  – October 2024 TPS6287B10 , TPS6287B15 , TPS6287B20 , TPS6287B25 , TPS6287B30

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Characteristics
    7. 6.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed-Frequency DCS-Control Topology
      2. 8.3.2  Forced-PWM and Power-Save Modes
      3. 8.3.3  Transient Non-Synchronous Mode (optional)
      4. 8.3.4  Precise Enable
      5. 8.3.5  Start-Up
      6. 8.3.6  Switching Frequency Selection, Only Applies to TPS6287BxxJE2
      7. 8.3.7  Output Voltage Setting
        1. 8.3.7.1 Output Voltage Range
        2. 8.3.7.2 Output Voltage Setpoint
        3. 8.3.7.3 Non-Default Output Voltage Setpoint
        4. 8.3.7.4 Dynamic Voltage Scaling
        5. 8.3.7.5 Droop Compensation
      8. 8.3.8  Compensation (COMP)
      9. 8.3.9  Mode Selection / Clock Synchronization (MODE/SYNC)
      10. 8.3.10 Spread Spectrum Clocking (SSC)
      11. 8.3.11 Output Discharge
      12. 8.3.12 Undervoltage Lockout (UVLO)
      13. 8.3.13 Overvoltage Lockout (OVLO)
      14. 8.3.14 Overcurrent Protection
        1. 8.3.14.1 Cycle-by-Cycle Current Limiting
        2. 8.3.14.2 Hiccup Mode
        3. 8.3.14.3 Current-Limit Mode
      15. 8.3.15 Power Good (PG)
        1. 8.3.15.1 Standalone, Primary Device Behavior
        2. 8.3.15.2 Secondary Device Behavior
      16. 8.3.16 Remote Sense
      17. 8.3.17 Thermal Warning and Shutdown
      18. 8.3.18 Stacked Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
      2. 8.4.2 Undervoltage Lockout
      3. 8.4.3 Standby
      4. 8.4.4 On
    5. 8.5 Programming
      1. 8.5.1 Serial Interface Description
      2. 8.5.2 Standard-, Fast-, Fast-Mode Plus Protocol
      3. 8.5.3 HS-Mode Protocol
      4. 8.5.4 I2C Update Sequence
      5. 8.5.5 I2C Register Reset
      6. 8.5.6 Dynamic Voltage Scaling (DVS)
  10. Device Registers
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Inductor Selection
        2. 10.2.2.2 Selecting the Input Capacitors
        3. 10.2.2.3 Selecting the Compensation Resistor
        4. 10.2.2.4 Selecting the Output Capacitors
        5. 10.2.2.5 Selecting the Compensation Capacitor CC
        6. 10.2.2.6 Selecting the Compensation Capacitor CC2
      3. 10.2.3 Application Curves
    3. 10.3 Typical Application - TPS6287BxV Devices
      1. 10.3.1 Design Requirements for TPS6287BxV
    4. 10.4 Typical Application Using Two TPS6287B25 in a Stacked Configuration
      1. 10.4.1 Design Requirements For Two Stacked Devices
      2. 10.4.2 Detailed Design Procedure
        1. 10.4.2.1 Selecting the Compensation Resistor
        2. 10.4.2.2 Selecting the Output Capacitors
        3. 10.4.2.3 Selecting the Compensation Capacitor CC
      3. 10.4.3 Application Curves for Two Stacked Devices
    5. 10.5 Typical Application Using Three TPS6287B25 in a Stacked Configuration
      1. 10.5.1 Application Curves
    6. 10.6 Power Supply Recommendations
    7. 10.7 Layout
      1. 10.7.1 Layout Guidelines
      2. 10.7.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Output Voltage Setpoint

Together with the selected range, the VSET[7:0] bits in the VSET register control the output voltage setpoint of the device (see Table 8-4).

Table 8-4 Start-Up Voltage Settings
VRANGE[1:0]Output Voltage Setpoint
0b000.4V + VSET[7:0] × 1.25mV
0b010.4V + VSET[7:0] × 2.5mV
0b10 (default)0.4V + VSET[7:0] × 5mV
0b110.4V + VSET[7:0] × 5mV

During initialization, the device reads the state of the VSET1 and VSET2 pins and selects the default output voltage according to . Note that the VSET1 and VSET2 pins also selects the I2C target address of the device (see below). Please see the DEVICE OPTIONS table for the complete list of device versions and their Output Voltage Setpoint.

Table 8-5 Default Output Voltage Setpoints for TPS6287BxxL
VSET1 PinVSET2 PinI2C Device AddressOutput Voltage Setpoint
Short Circuit to GNDShort Circuit to GND0x45400mV
Short Circuit to GND6.2kΩ to GND0x44425mV
Short Circuit to GND47kΩ to VIN0x47450mV
Short Circuit to GNDShort Circuit to VIN0x46475mV
6.2kΩ to GNDShort Circuit to GND0x45500mV
6.2kΩ to GND6.2kΩ to GND0x44525mV
6.2kΩ to GND47kΩ to VIN0x47550mV
6.2kΩ to GNDShort Circuit to VIN0x46575mV
47kΩ to VINShort Circuit to GND0x45600mV
47kΩ to VIN6.2kΩ to GND0x44625mV
47kΩ to VIN47kΩ to VIN0x47650mV
47kΩ to VINShort Circuit to VIN0x46675mV
Short Circuit to VINShort Circuit to GND0x45700mV
Short Circuit to VIN6.2kΩ to GND0x44725mV
Short Circuit to VIN47kΩ to VIN0x47750mV
Short Circuit to VINShort Circuit to VIN0x46775mV
Table 8-6 Default Output Voltage Setpoints for TPS6287BxxH
VSET1 PinVSET2 PinI2C Device AddressOutput Voltage Setpoint
Short Circuit to GNDShort Circuit to GND0x45800mV
Short Circuit to GND6.2kΩ to GND0x44850mV
Short Circuit to GND47kΩ to VIN0x47900mV
Short Circuit to GNDShort Circuit to VIN0x46950mV
6.2kΩ to GNDShort Circuit to GND0x451000mV
6.2kΩ to GND6.2kΩ to GND0x441050mV
6.2kΩ to GND47kΩ to VIN0x471100mV
6.2kΩ to GNDShort Circuit to VIN0x461150mV
47kΩ to VINShort Circuit to GND0x451200mV
47kΩ to VIN6.2kΩ to GND0x441250mV
47kΩ to VIN47kΩ to VIN0x471300mV
47kΩ to VINShort Circuit to VIN0x461350mV
Short Circuit to VINShort Circuit to GND0x451400mV
Short Circuit to VIN6.2kΩ to GND0x441450mV
Short Circuit to VIN47kΩ to VIN0x471500mV
Short Circuit to VINShort Circuit to VIN0x461550mV
Table 8-7 Default Voltage Setpoints for TPS6287BxxV
VSET4=LOWVSET4=HIGH
VSET1 pinVSET2 pinVSET3=LOWVSET3=HIGHVSET3=LOWVSET3=HIGH
Short Circuit to GNDShort Circuit to GND400mV425mV900mV925mV
Short Circuit to GND6.2kΩ to GND450 mV475 mV950 mV975 mV
Short Circuit to GND47kΩ to VIN500 mV525 mV1000 mV1025 mV
Short Circuit to GNDShort Circuit to VIN550 mV575 mV1050 mV1075 mV
6.2kΩ to GNDShort Circuit to GND600mV625 mV1100 mV

1125 mV

6.2kΩ to GND6.2kΩ to GND650 mV675 mV1150 mV1175 mV
6.2kΩ to GND47kΩ to VIN700 mV725 mV1200 mV1225 mV
6.2kΩ to GNDShort Circuit to VIN750 mV775 mV1250 mV1275 mV
47kΩ to VINShort Circuit to GND800 mV825 mV1300 mV1325 mV
47kΩ to VIN6.2kΩ to GND850 mV875 mV1350 mV1375 mV
47kΩ to VIN47kΩ to VIN900 mV925 mV1400 mV1425 mV
47kΩ to VINShort Circuit to VIN950 mV975 mV1450 mV1475 mV
Short Circuit to VINShort Circuit to GND1000 mV1025 mV1500 mV1525 mV
Short Circuit to VIN6.2kΩ to GND1050 mV1075 mV1550 mV1575 mV
Short Circuit to VIN47kΩ to VIN1100 mV1125 mV1600 mV1625 mV
Short Circuit to VINShort Circuit to VIN1150 mV1175 mV1650 mV1675 mV
Table 8-8 Default Output Voltage Setpoints for TPS6287BxxJE2
VSEL Pin(1) VSET[7:0] I2C Device Address Output Voltage Setpoint
6.2kΩ to GND 0x50 0x44 800mV
Short-Circuit to GND 0x50 0x45 800mV
Short-Circuit to VIN 0x5F 0x46 875mV
47kΩ to VIN 0x50 0x47 800mV

If you program new output voltage setpoint (VOUT[7:0]), output voltage range (VRANGE[1:0]), or soft-start time (SSTIME[1:0]) settings when the device has already begun the soft-start sequence, the device ignores the new values until the soft-start sequence is complete. For example, if you change the value of VSET[7:0] during soft-start, the device first ramps to the value that VSET[7:0] had when the soft-start sequence began and then, when soft-start is complete, ramps up or down to the new value.

If you change VOUT[7:0], VRAMP[1:0], or SSTIME[1:0] while EN is low, the device uses the new values the next time you enable it.

During start-up the output voltage ramps up to the target value set by the VSET1 and VSET2 pins before ramping up or down to any new value programmed to the device over the I2C interface.

For reliable voltage setting, make sure that there is no stray current path connected to the VSEL pin and that the parasitic capacitance between the VSET1 and VSET2 pins and GND is less than 30pF.