SLVSFM1A March   2021  – November 2023 TPS62902

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Mode Selection and Device Configuration MODE/S-CONF
      2. 7.3.2 Adjustable VO Operation (External Voltage Divider)
      3. 7.3.3 Setable VO Operation (VSET and Internal Voltage Divider)
      4. 7.3.4 Soft Start / Tracking (SS/TR)
      5. 7.3.5 Smart Enable with Precise Threshold
      6. 7.3.6 Power Good (PG)
      7. 7.3.7 Undervoltage Lockout (UVLO)
      8. 7.3.8 Current Limit And Short Circuit Protection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Pulse Width Modulation (PWM) Operation
      2. 7.4.2 AEE (Automatic Efficiency Enhancement)
      3. 7.4.3 Power Save Mode Operation (Auto PFM/PWM)
      4. 7.4.4 100% Duty-Cycle Operation
      5. 7.4.5 Output Discharge Function
      6. 7.4.6 Starting into a Pre-Biased Load
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application with Adjustable Output Voltage
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Programming the Output Voltage
        3. 8.2.2.3 External Component Selection
        4. 8.2.2.4 Inductor Selection
        5. 8.2.2.5 Capacitor Selection
          1. 8.2.2.5.1 Output Capacitor
          2. 8.2.2.5.2 Input Capacitor
          3. 8.2.2.5.3 Soft-Start Capacitor
        6. 8.2.2.6 Tracking Function
        7. 8.2.2.7 Output Filter and Loop Stability
      3. 8.2.3 Application Curves
      4. 8.2.4 Typical Application with Setable VO using VSET
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curves
    3. 8.3 System Examples
      1. 8.3.1 LED Power Supply
      2. 8.3.2 Powering Multiple Loads
      3. 8.3.3 Voltage Tracking
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
        1. 8.5.2.1 Thermal Considerations
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Custom Design With WEBENCH® Tools
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
  • RPJ|9
サーマルパッド・メカニカル・データ
発注情報

Pin Configuration and Functions

GUID-93082CEA-DB72-4514-AE05-FE6C521631C0-low.gif Figure 5-1 9-Pin RPJ VQFN Package (Top View, Device Pins Face Down)
Table 5-1 Pin Functions
PIN I/O DESCRIPTION
NUMBER NAME
1 PG O Open-drain power good output. High = VOUT is ready. Low = VOUT is below nominal regulation. This pin requires a pullup resistor.
2 SW Switch pin of the converter and is connected to the internal power switches. Connect the inductor between SW and the output capacitor.
3 VOS I Output voltage sense pin. Connect directly to the positive pin of the output capacitor.
4 GND Ground pin. It must be connected directly to the common ground plane.
5 EN I Enable input pin. Connect to logic low to disable the device. Pull high to enable the device. Do not leave this pin unconnected.
6 VIN I Power supply input pin. Make sure the input capacitor is connected as close as possible between the VIN and GND pins.
7 MODE/
S-CONF
I Device mode selection (auto PFM/PWM or forced PWM operation) and SmartConfig™ pin. Connect high, low, or to a resistor to configure the device according to Table 7-1. Do not leave this pin unconnected.
8 SS/TR I Soft Start/Tracking pin. An external capacitor connected from this pin to GND defines the rise time for the internal reference voltage. The pin can also be used as an input for tracking and sequencing. The pin can be left floating for the fastest ramp-up time.
9 FB/
VSET
I Depends on device configuration (see Section 7.3.1)
  • FB: Voltage feedback input. Connect resistive output voltage divider to this pin.
  • VSET: Output voltage setting pin. Connect a resistor to GND to choose the output voltage according to Table 7-2.