JAJSNR8A april   2023  – june 2023 TPS62A06 , TPS62A06A

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Save Mode
      2. 8.3.2 100% Duty Cycle Low Dropout Operation
      3. 8.3.3 Soft Start
      4. 8.3.4 Switch Current Limit and Short-Circuit Protection (HICCUP)
      5. 8.3.5 Undervoltage Lockout
      6. 8.3.6 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable and Disable
      2. 8.4.2 Power Good
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Setting the Output Voltage
        2. 9.2.2.2 Feedforward Capacitor
        3. 9.2.2.3 Output Filter Design
        4. 9.2.2.4 Input and Output Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

GUID-D8935F6D-D3EA-4C34-BA18-5F39DF96B2EE-low.svgFigure 6-1 6-Pin DRL SOT563 Package (Top View)
Table 6-1 Pin Functions
PINI/O(1)DESCRIPTION
NAMENO.
EN4IDevice enable logic input. Logic high enables the device, logic low disables the device and turns the device into shutdown. Do not leave the pin floating.
FB5IFeedback pin for the internal control loop. Connect this pin to an external feedback divider.
GND1GGround pin
PG6OPower-good open-drain output pin. The pullup resistor cannot be connected to any voltage higher than 5.5 V. If unused, leave the pin open or connect to GND.
SW2OSwitch pin connected to the internal FET switches and inductor terminal. Connect the inductor of the output filter to this pin.
VIN3IPower supply voltage pin
(1) I = Input, O = Output, G = Ground