I²C is a 2-wire serial interface developed by Philips Semiconductor, now NXP Semiconductors (see NXP Semiconductors, UM10204 – I²C-Bus Specification and User Manual ). The bus consists of a data line (SDA) and a clock line (SCL) with pullup structures. When the bus is idle, both SDA and SCL lines are pulled high. All the I²C-compatible devices connect to the I²C bus through open-drain I/O pins, SDA, and SCL. A controller device, usually a microcontroller or a digital signal processor, controls the bus. The controller is responsible for generating the SCL signal and device addresses. The controller also generates specific conditions that indicate the START and STOP of data transfer. A target device receives and transmits data on the bus under control of the controller device.

The device works as a target and supports the following data transfer modes, as defined in the I²C-Bus Specification:

• Standard-mode (100 kbps)
• Fast-mode (400 kbps)
• Fast-mode Plus (1 Mbps)

The interface adds flexibility to the power supply solution, enabling most functions to be programmed to new values, depending on the instantaneous application requirements. Register contents remain intact as long as supply voltage remains above V_IT+(POR) .

The data transfer protocol for standard and fast modes is exactly the same, therefore, it is referred to as F/S-mode in this document. The device supports 7-bit addressing; 10-bit addressing and general call address are not supported. The device 7-bit address is 2Ah (00101010b).

To make sure that the I²C function in the device is correctly reset, it is recommended that the I²C controller initiates a STOP condition on the I²C bus after the initial power up of SDA and SCL pullup voltages.