JAJSPL9 july   2023 TPS631012 , TPS631013

PRODMIX  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Rating
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics 
    6. 7.6 Timing Requirements
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO)
      2. 8.3.2 Enable and Soft Start
      3. 8.3.3 Device Enable (EN)
      4. 8.3.4 Output Voltage Control
      5. 8.3.5 Mode Selection (PFM/FPWM)
      6. 8.3.6 Output Discharge
      7. 8.3.7 Reverse Current Operation
      8. 8.3.8 Protection Features
        1. 8.3.8.1 Input Overvoltage Protection
        2. 8.3.8.2 Output Overvoltage Protection
        3. 8.3.8.3 Short Circuit Protection/Hiccup
        4. 8.3.8.4 Thermal Shutdown
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
      1. 8.5.1 Serial Interface Description
      2. 8.5.2 Standard-, Fast-, and Fast-Mode Plus Protocol
      3. 8.5.3 I2C Update Sequence
    6. 8.6 Register Map
      1. 8.6.1 Register Description
        1. 8.6.1.1 Register Map
        2. 8.6.1.2 Register CONTROL1 (Register address: 0x02; Default: 0x08)
        3. 8.6.1.3 Register VOUT (Register address: 0x03; Default: 0x5C)
        4. 8.6.1.4 Register CONTROL2 (Register address: 0x05; Default: 0x45)
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
        4. 9.2.2.4 Setting the Output Voltage
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Output Voltage Control

The TPS631012 and TPS631013 can generate output voltages from 1.0 V to 5.5 V with a 25 mV step. The Register VOUT is used to set the output voltage:

  • VOUT = 1.000 + (VOUT[7 :0] × 0.025) V, when 0x00<=VOUT[7 :0]<=0xB4;
  • VOUT = 5.5 V, when 0xB5<=VOUT[7 :0]<=0xFF

VOUT[7 :0] is the 8-bit value in the Register VOUT.

The dynamic voltage scaling control bit of EN_FAST_DVS in Register CONTROL1 controls the VOUT settling time when VOUT is set between different voltages.

  • When EN_FAST_DVS = 1, the typical VOUT slew rate is 7.2 V/ms;
  • When EN_FAST_DVS = 0, the typical VOUT slew rate is 0.4 V/ms