JAJSI40C July 2019 – February 2020 TPS63810 , TPS63811
PRODUCTION DATA.
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
A1 | EN | I | Device enable. A high logic level on this pin enables the device; a low logic level on this pin disables the device. |
A2 | VIN | — | Supply voltage for power stage |
A3 | VIN | — | Supply voltage for power stage |
B1 | VSEL | I | This pin selects which VOUT register is active. When a low logic level is applied to this pin, the VOUT1 register sets the output voltage. When a high logic level is applied to this pin, the VOUT2 register sets the output voltage. |
B2 | LX1 | — | Inductor connection |
B3 | LX1 | — | Inductor connection |
C1 | AGND | — | Analog ground |
C2 | GND | — | Power ground |
C3 | GND | — | Power ground |
D1 | SCL | I/O | I2C serial interface clock. Pull this pin up to the I2C bus voltage with a resistor or a current source. |
D2 | LX2 | — | Inductor connection |
D3 | LX2 | — | Inductor connection |
E1 | SDA | I/O | I2C serial interface data. Pull this pin up to the I2C bus voltage with a resistor or a current source. |
E2 | VOUT | — | Converter output |
E3 | VOUT | — | Converter output |