JAJSF84B December   2008  – May 2018 TPS650250

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     詳細ブロック図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Dissipation Ratings
    6. 6.6  Electrical Characteristics
    7. 6.7  Electrical Characteristics VDCDC1
    8. 6.8  Electrical Characteristics VDCDC2
    9. 6.9  Electrical Characteristics VDCDC3
    10. 6.10 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Step-Down Converters, VDCDC1, VDCDC2 AND VDCDC3
      2. 7.3.2 Power Save Mode Operation
      3. 7.3.3 Soft Start
      4. 7.3.4 100% Duty Cycle Low Dropout Operation
      5. 7.3.5 Low Dropout Voltage Regulators
      6. 7.3.6 Undervoltage Lockout
      7. 7.3.7 PWRFAIL
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Typical Configuration For The Samsung Processor S3C6400-533MHz
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Inductor Selection for the DCDC Converters
        2. 8.2.3.2 Output Capacitor Selection
        3. 8.2.3.3 Input Capacitor Selection
        4. 8.2.3.4 Output Voltage Selection
        5. 8.2.3.5 Voltage Change on VDCDC3
        6. 8.2.3.6 Vdd_alive Output
        7. 8.2.3.7 LDO1 and LDO2
        8. 8.2.3.8 Vcc-Filter
      4. 8.2.4 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 開発サポート
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VCC Input voltage range step-down converters, VINDCDC1, VINDCDC2, VINDCDC3 2.5 6.0 V
VO Output voltage range for step-down converter, VDCDC1 (1) 0.6 VINDCDC1 V
Output voltage range for mem step-down converter, VDCDC2(1) 0.6 VINDCDC2 V
Output voltage range for core step-down converter, VDCDC3 0.6 VINDCDC3 V
VI Input voltage range for LDOs, VINLDO1, VINLDO2 1.5 6.5 V
VO Output voltage range for LDOs 1 3.3 V
IO Output current at L, V1DCDC1 1600 mA
L1 Inductor at L1(2) 1.5 2.2 μH
CI Input capacitor at VINDCDC1(2) 10 μF
CO Output capacitor at VDCDC1(2) 10 22 μF
IO Output current at L2, VDCDC2 800 mA
L2 Inductor at L2(2) 1.5 2.2 μH
CI Input capacitor at VINDCDC2 (2) 10 μF
CO Output capacitor at VDCDC2 (2) 10 22 μF
IO Output current at L3, VDCDC3 800 mA
L3 Inductor at L3(2) 1.5 2.2 μH
CI Input capacitor at VINDCDC3(2) 10 μF
CO Output capacitor at VDCDC3 (2) 10 22 μF
CI Input capacitor at VCC(2) 1 μF
CI Input capacitor at VINLDO(2) 1 μF
CO Output capacitor at VLDO1, VLDO2(2) 2.2 μF
IO Output current at VLDO1, VLDO2 200 mA
CO Output capacitor at Vdd_alive(2) 2.2 μF
IO Output current at Vdd_alive 30 mA
TA Operating ambient temperature –40 85 °C
TJ Operating junction temperature –40 125 °C
RCC Resistor from VINDCDC3,VINDCDC2, VINDCDC1 to VCC used for filtering(3) 1 10 Ω
(1) When using an external resistor divider at DEFDCDC2, DEFDCDC1.
(2) See applications section for more information, for VO > 2.85V choose 3.3μH inductor.
(3) Up to 2.5mA can flow into VCC when all 3 converters are running in PWM, this resistor will cause the UVLO threshold to be shifted accordingly.