JAJSFE6I July 2009 – May 2018 TPS65070 , TPS65072 , TPS65073 , TPS650731 , TPS650732
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
VVINDCDC1 | Input voltage range | Connected to SYS pin | 2.8 | 6.3 | V | |
IO | Maximum output | 600 | mA | |||
RDS(ON) | High side MOSFET ON-resistance | VINDCDC1 = 2.8 V | 150 | 300 | mΩ | |
VINDCDC1 = 3.5 V | 120 | 200 | ||||
ILH | High side MOSFET leakage current | VINDCDC1 = 6.3 V | 2 | µA | ||
RDS(ON) | Low side MOSFET ON-resistance | VINDCDC1 = 2.8 V | 200 | 300 | mΩ | |
VINDCDC1 = 3.5 V | 160 | 180 | ||||
ILL | Low side MOSFET leakage current | VDS = 6.3 V | 1 | µA | ||
ILIMF | Forward current limit | for TPS65072, TPS65073, TPS650731, TPS650732 | 0.8 | 1.1 | 1.5 | A |
ILIMF | Forward current limit | for TPS65070 | 1.1 | 1.6 | 2.2 | A |
fS | Oscillator frequency | 1.95 | 2.25 | 2.55 | MHz | |
Vout | Fixed output voltage range | Internal resistor divider, I2C selectable | 0.725 | 3.3 | V | |
Vout | Default output voltage | For TPS65070, TPS65072 | 3.3 | V | ||
For TPS65073, TPS650731, TPS650732 | 1.8 | |||||
Vout | DC output voltage accuracy; PFM mode(1) | VINDCDC1 = VDCDC1 +0.3 V to 6.3 V;
0 mA = IO = 0.6 A |
–2% | 3% | ||
Vout | DC output voltage accuracy; PWM mode(1) | VINDCDC1 = VDCDC1 +0.3 V to 6.3 V;
0 mA = IO = 0.6 A |
–1.5% | 1.5% | ||
ΔVOUT | Power save mode ripple voltage(2) | IOUT = 1 mA, PFM mode | 40 | mVpp | ||
tStart | Start-up time | Time from active EN to Start switching | 170 | µs | ||
tRamp | VOUT ramp up time | Time to ramp from 5% to 95% of VOUT | 250 | µs | ||
Power good threshold | rising voltage | Vo - 5% | ||||
Power good threshold | falling voltage | Vo - 10% | ||||
RDIS | Internal discharge resistor at L1 | –35% | 250 | 35% | Ω |