JAJSFE6I July 2009 – May 2018 TPS65070 , TPS65072 , TPS65073 , TPS650731 , TPS650732
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
CON_CTRL3 | B7 | B6 | B5 | B4 | B3 | B2 | B1 | BO |
---|---|---|---|---|---|---|---|---|
Bit name and function | FPWM
DCDC3 |
FPWM
DCDC2 |
FPWM
DCDC1 |
DCDC1
discharge |
DCDC2
discharge |
DCDC3
discharge |
LDO1
discharge |
LDO2
discharge |
Default | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
Default value loaded by: | UVLO | UVLO | UVLO | UVLO | UVLO | UVLO | UVLO | UVLO |
Read/write | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Bit 7 | FPWM DCDC3:
0 = DCDC3 converter operates in PWM / PFM mode 1 = DCDC3 converter is forced into fixed frequency PWM mode |
Bit 6 | FPWM DCDC2:
0 = DCDC2 converter operates in PWM / PFM mode 1 = DCDC2 converter is forced into fixed frequency PWM mode |
Bit 5 | FPWM DCDC1:
0 = DCDC1 converter operates in PWM / PFM mode 1 = DCDC1 converter is forced into fixed frequency PWM mode |
Bit 4–0 | 0 = the output capacitor of the associated converter or LDO is not actively discharged when the converter or LDO is disabled
1 = the output capacitor of the associated converter or LDO is actively discharged when the converter or LDO is disabled. This decreases the fall time of the output voltage at light load |