JAJSVA1F
May 2012 – August 2024
TPS65131-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Power Conversion
7.3.2
Control
7.3.3
Output Rails Enable or Disable
7.3.4
Load Disconnect
7.3.5
Soft Start
7.3.6
Overvoltage Protection
7.3.7
Undervoltage Lockout
7.3.8
Overtemperature Shutdown
7.4
Device Functional Modes
7.4.1
Power-Save Mode
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
TPS65131-Q1 With VPOS = 10.5V, VNEG = –10V
8.2.2
Design Requirements
8.2.3
Detailed Design Procedure
8.2.3.1
Programming the Output Voltage
8.2.3.1.1
Boost Converter
8.2.3.1.2
Inverting Converter
8.2.3.1.3
Inductor Selection
8.2.3.2
Capacitor Selection
8.2.3.2.1
Input Capacitor
8.2.3.2.2
Output Capacitors
8.2.3.3
Rectifier Diode Selection
8.2.3.4
External P-MOSFET Selection
8.2.3.5
Stabilizing the Control Loop
8.2.3.5.1
Feedforward Capacitors
8.2.3.5.2
Compensation Capacitors
8.2.4
Analog Supply Input Filter
8.2.4.1
RC-Filter
8.2.4.2
LC-Filter
8.2.5
Thermal Information
8.2.6
Application Curves
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
ドキュメントの更新通知を受け取る方法
9.2
サポート・リソース
9.3
商標
9.4
静電気放電に関する注意事項
9.5
用語集
10
Revision History
11
Mechanical, Packaging, and Orderable Information
11.1
Mechanical Data
11.2
Tape and Reel Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RGE|24
MPQF124G
サーマルパッド・メカニカル・データ
RGE|24
QFND008AA
発注情報
jajsva1f_oa
jajsva1f_pm
8.2.3.5
Stabilizing the Control Loop