JAJSOJ1E March   2004  – April 2022 TPS65130 , TPS65131

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Conversion
      2. 7.3.2 Control
      3. 7.3.3 Enable
      4. 7.3.4 Load Disconnect
      5. 7.3.5 Soft-Start
      6. 7.3.6 Overvoltage Protection
      7. 7.3.7 Undervoltage Lockout
      8. 7.3.8 Overtemperature Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Save Mode
      2. 7.4.2 Full Operation with VIN > 2.7 V
      3. 7.4.3 Limited Operation with VUVLO < VIN < 2.7 V
      4. 7.4.4 No Operation with VIN < VUVLO
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Programming the Output Voltage
          1. 8.2.2.1.1 Boost Converter
          2. 8.2.2.1.2 Inverting Converter
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Capacitor Selection
          1. 8.2.2.3.1 Input Capacitor
          2. 8.2.2.3.2 Output Capacitors
        4. 8.2.2.4 Rectifier Diode Selection
        5. 8.2.2.5 External PMOS Selection
        6. 8.2.2.6 Stabilizing the Control Loop
          1. 8.2.2.6.1 Feedforward Capacitor
          2. 8.2.2.6.2 Compensation Capacitors
      3. 8.2.3 Analog Supply Filter
        1. 8.2.3.1 RC-Filter
        2. 8.2.3.2 LC-Filter
      4. 8.2.4 Application Curves
        1.       Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
    3. 9.3 Thermal Considerations
  10. 10Device and Documentation Support
    1. 10.1 Device Support
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RGE|24
サーマルパッド・メカニカル・データ
発注情報

8.2.1 Design Requirements

Figure 8-1 uses the following parameters:

Table 8-1 Design Parameters
DESIGN PARAMETEREXAMPLE VALUE
Input voltage range2.7 V to 5.5 V
Boost converter output voltage, VPOSR1 = 1 MΩ
R2 = 130kΩ
C9 = 6.8 pF		10.5 V
Inverting converter output voltage, VNEGR3 = 1 MΩ
R4 = 121.2 kΩ
C10 = 7.5 pF		–10 V
Table 8-2 List of Components
REFERENCESETUPVALUE, DESCRIPTION
C1, C2—4.7 µF, ceramic, 6.3 V, X5R
C30.1 µF, ceramic, 10 V, X5R
C4, C54 x 4.7 µF, ceramic, 25 V, X7R
C610 nF, ceramic, 16 V, X7R
C74.7 nF, 50 V, C0G
C8220 nF, ceramic, 6.3 V, X5R
R1VPOS = 10.5 V1 MΩ
VPOS = 15 V975 kΩ
R2VPOS = 10.5 V130 kΩ
VPOS = 15 V85.8 kΩ
R3VNEG = –10 V1 MΩ
VNEG = –15 V1.3 MΩ
R4VNEG = –10 V121.2 kΩ
VNEG = –15 V104.8 kΩ
R7—100 Ω
D1, D2Schottky, 1 A, 20 V, Onsemi MBRM120
L1, L2Wurth Elektronik 7447789004 (TPS65130), EPCOS B82462-G4472 (TPS65131)
Q1MOSFET, P-channel, 12 V, 4 A, Vishay Si2323DS