5.6.4.1 CHIPID Register (subaddress = 0x0) [reset = 0x5]
CHIPID is shown in Figure 5-36 and described in Table 5-8.
Return to Summary Table.
Figure 5-36 CHIPID Register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
CHIP |
REV |
R-0h |
R-5h |
Table 5-8 CHIPID Register Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
7-3 |
CHIP |
R |
0h |
Chip ID
0h = TPS65218D0
1h = Future use
...
1Fh = Future use
|
2-0 |
REV |
R |
5h |
Revision code
0h = Revision 1.0
1h = Revision 1.1
2h = Revision 2.0
3h = Revision 2.1
4h = Revision 3.0
5h = Revision 4.0 (D0)
6h = Future use
7h = Future use
|