JAJSI91D
december 2019 – may 2023
TPS652353
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Boost Converter
7.3.2
Linear Regulator and Current Limit
7.3.3
Boost Converter Current Limit
7.3.4
Charge Pump
7.3.5
Slew Rate Control
7.3.6
Short Circuit Protection, Hiccup and Overtemperature Protection
7.3.7
Tone Generation
7.3.8
Tone Detection
7.3.9
Audio Noise Rejection
7.3.10
Disable and Enable
7.3.11
Component Selection
7.3.11.1
Boost Inductor
7.3.11.2
Capacitor Selection
7.3.11.3
Surge Components
7.3.11.4
Consideration for Boost Filtering and LNB Noise
7.4
Device Functional Modes
7.5
Programming
7.5.1
Serial Interface Description
7.5.2
TPS652353 I2C Update Sequence
7.6
Register Maps
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
DiSEqc1.x Support
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curves
8.2.2
DiSEqc2.x Support
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.2.3
Application Curve
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
サード・パーティ製品に関する免責事項
9.2
Documentation Support
9.2.1
Related Documentation
9.3
ドキュメントの更新通知を受け取る方法
9.4
サポート・リソース
9.5
Trademarks
9.6
静電気放電に関する注意事項
9.7
用語集
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RUK|20
MPQF220D
サーマルパッド・メカニカル・データ
RUK|20
QFND191D
発注情報
jajsi91d_oa
jajsi91d_pm
Data Sheet
I
2
C インターフェイス搭載の TPS652353 LNB 電圧レギュレータ