JAJSNG4B January   2015  – January 2022 TPS65251-1 , TPS65251-2 , TPS65251-3

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics for Buck 1
    7. 6.7 Typical Characteristics for Buck 2
    8. 6.8 Typical Characteristics for Buck 3
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjustable Switching Frequency
      2. 7.3.2  Synchronization
      3. 7.3.3  Out-of-Phase Operation
      4. 7.3.4  Delayed Start-Up
      5. 7.3.5  Soft-Start Time
      6. 7.3.6  Adjusting the Output Voltage
      7. 7.3.7  Input Capacitor
      8. 7.3.8  Bootstrap Capacitor
      9. 7.3.9  Error Amplifier
      10. 7.3.10 Slope Compensation
      11. 7.3.11 Power Good
      12. 7.3.12 3.3-V and 6.5-V LDO Regulators
      13. 7.3.13 Current Limit Protection
      14. 7.3.14 Overvoltage Transient Protection (OVP)
      15. 7.3.15 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Low-Power/Pulse Skipping Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Loop Compensation Circuit
        2. 8.2.2.2  Selecting the Switching Frequency
        3. 8.2.2.3  Output Inductor Selection
        4. 8.2.2.4  Output Capacitor
        5. 8.2.2.5  Input Capacitor
        6. 8.2.2.6  Soft-Start Capacitor
        7. 8.2.2.7  Bootstrap Capacitor Selection
        8. 8.2.2.8  Adjustable Current Limiting Resistor Selection
        9. 8.2.2.9  Output Voltage and Feedback Resistors Selection
        10. 8.2.2.10 Compensation
        11. 8.2.2.11 3.3-V and 6.5-V LDO Regulators
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 サポート・リソース
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.11 Power Good

The PGOOD pin is an open-drain output. The PGOOD pin is pulled low when any buck converter is pulled below 85% of the nominal output voltage. TI recommends to use a pullup resistor from the PGOOD to the output of Buck 1. The PGOOD is pulled up when all three buck converters’ outputs are more than 90% of its nominal output voltage.

The reset time of the PGOOD pin varies according to the part:

  • TPS65251-1 is 1 s.
  • TPS65251-2 is 32 ms.
  • TPS65251-3 is 256 ms.

The polarity of the PGOOD pin is active high.