JAJSC02C december 2013 – may 2023 TPS65261 , TPS65261-1
PRODUCTION DATA
The TPS65261, TPS65261-1 is a monolithic triple synchronous step-down (buck) converter with 3A/2A/2A output currents. A wide 4.5V to 18V input supply voltage range encompasses the most intermediate bus voltages operating off 5V, 9V, 12V or 15V power bus. The feedback voltage reference for each buck is 0.6V. Each buck is independent with dedicated enable, soft-start and loop compensation pins.
The TPS65261, TPS65261-1 implements a constant frequency, peak current mode control that simplifies external loop compensation. The wide switching frequency of 250kHz to 2MHz allows optimizing system efficiency, filtering size and bandwidth. The switching frequency can be adjusted with an external resistor connected between ROSC pin and ground. The switching clock of buck1 is 180° out-of-phase operation from the clocks of buck2 and buck3 channels to reduce input current ripple, input capacitor size and power supply induced noise.
The TPS65261, TPS65261-1 has been designed for safe monotonic startup into pre-biased loads. The default start up is when VIN is typically 4.5V. The ENx pin also can be used to adjust the input voltage under voltage lockout (UVLO) with an external resistor divider. In addition, the ENx pin has an internal 3.6uA current source, so the EN pin can be floating to automatically power up the converters.
The TPS65261, TPS65261-1 reduces the external component count by integrating a bootstrap circuit. The bias voltage for the integrated high-side MOSFET is supplied by a capacitor between the BST and LX pin. A UVLO circuit monitors the bootstrap capacitor voltage VBST-VLX in each buck. When VBST-VLX voltage drops to the threshold, LX pin is pulled low to recharge the bootstrap capacitor. The TPS65261, TPS65261-1 can operate at 100% duty cycle as long as the bootstrap capacitor voltage is higher than the BOOT-LX UVLO threshold which is typically 2.1V.
The TPS65261, TPS65261-1 features a PGOOD pin to supervise each output voltage of the buck converters. The TPS65261, TPS65261-1 has power good comparators with hysteresis, which monitor the output voltages through feedback voltages. When all bucks are in regulation range and power sequence is done, PGOOD is asserted to high.
The SS (soft start/tracking) pin is used to minimize inrush currents or provide power supply sequencing during power up. A small value capacitor or resistor divider is connected to the pin for soft start or voltage tracking.
At light loading, TPS65261 will automatically operate in pulse skipping mode (PSM) to save power.
The TPS65261, TPS65261-1 is protected from overload and over temperature fault conditions. The converter minimizes excessive output overvoltage transients by taking advantage of the power good comparator. When the output is overvoltage, the high-side MOSFET is turned off until the internal feedback voltage is lower than 105% of the 0.6V reference voltage. The TPS65261, TPS65261-1 implements both high-side MOSFET overload protection and bidirectional low-side MOSFET overload protection to avoid inductor current runaway. If the overcurrent condition has lasted for more than the OC wait time (256 clock cycles), the converter will shut down and re-start after the hiccup time (8192 clock cycles). The TPS65261, TPS65261-1 shuts down if the junction temperature is higher than the thermal shutdown trip point. When the junction temperature drops 20°C typically below the thermal shutdown trip point, the TPS65261, TPS65261-1 will be restarted under control of the soft start circuit automatically.