JAJSC02C december   2013  – may 2023 TPS65261 , TPS65261-1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Power Failure Detector
      3. 7.3.3  Enable and Adjusting Undervoltage Lockout
      4. 7.3.4  Soft-Start Time
      5. 7.3.5  Power Up Sequencing
        1. 7.3.5.1 External Power Sequencing
        2. 7.3.5.2 Automatic Power Sequencing
      6. 7.3.6  V7V Low Dropout Regulator and Bootstrap
      7. 7.3.7  Out-of-Phase Operation
      8. 7.3.8  Output Overvoltage Protection (OVP)
      9. 7.3.9  Slope Compensation
      10. 7.3.10 Overcurrent Protection
        1. 7.3.10.1 High-side MOSFET Overcurrent Protection
        2. 7.3.10.2 Low-side MOSFET Overcurrent Protection
      11. 7.3.11 Power Good
      12. 7.3.12 Adjustable Switching Frequency
      13. 7.3.13 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Pulse Skipping MODE (PSM)
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Inductor Selection
        2. 8.2.2.2 Output Capacitor Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Loop Compensation
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Parts
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.5.2 Automatic Power Sequencing

The TPS65261, TPS65261-1 starts with a pre-defined power-up and power-down sequence when the MODE pin ties high to V7V. As shown in Table 7-2, the sequence is dictated by the different combinations of EN1 and EN2 status. EN3 is used to start/stop the converters. Buck2 and buck3 are identical converters and can be swapped in the system operation to allow for additional sequencing stages. Figure 7-9 shows the power sequencing when EN1 and EN2 are pulled up high.

Table 7-2 Power Sequencing
MODEEN1EN2EN3Start SequencingShutdown Sequencing
Automatic Power SequencingHighHighHighUsed to start/stop bucks in sequenceBuck1→Buck2→Buck3Buck3→Buck2→Buck1
HighLowHighBuck2→Buck1→Buck3Buck3→Buck1→Buck2
HighHighLowBuck2→Buck3→Buck1Buck1→Buck3→Buck2
HighLowLowReservedReservedReserved
Externally controlled sequencingLowUsed to start/stop buck1Used to start/stop buck2Used to start/stop buck3xx
GUID-F77DD94F-D5DF-4CC4-857A-C4B2EEA62946-low.gifFigure 7-9 Automatic Power Sequencing