JAJSQ69B
december 2015 – may 2023
TPS65265
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Adjusting the Output Voltage
8.3.2
Mix PGOOD, PG_DLY Functions
8.3.2.1
Programmable PGOOD DELAY
8.3.2.2
Relay Control
8.3.3
Enable and Adjusting UVLO
8.3.4
Soft-Start Time
8.3.5
Power-Up Sequencing
8.3.5.1
External Power Sequencing
8.3.5.2
Automatic Power Sequencing
8.3.6
V7V Low Dropout Regulator and Bootstrap
8.3.7
Out of Phase Operation
8.3.8
Output Overvoltage Protection (OVP)
8.3.9
PSM
8.3.10
Slope Compensation
8.3.11
Overcurrent Protection
8.3.11.1
High-Side MOSFET Overcurrent Protection
8.3.11.2
Low-Side MOSFET Overcurrent Protection
8.3.12
Adjustable Switching Frequency
8.3.13
Thermal Shutdown
8.4
Device Functional Modes
8.4.1
Operation With VIN < 4 V (Minimum VIN)
8.4.2
Operation With EN Control
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Output Inductor Selection
9.2.2.2
Output Capacitor Selection
9.2.2.3
Input Capacitor Selection
9.2.2.4
Loop Compensation
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
ドキュメントの更新通知を受け取る方法
10.2
サポート・リソース
10.3
Trademarks
10.4
静電気放電に関する注意事項
10.5
用語集
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RHB|32
MPQF130D
サーマルパッド・メカニカル・データ
RHB|32
QFND029X
発注情報
jajsq69b_oa
jajsq69b_pm
7
Specifications