JAJSNJ1H
May 2013 – December 2021
TPS65310A-Q1
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
概要 (続き)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
SPI Timing Requirements
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Buck Controller (Buck1)
8.3.1.1
Operating Modes
8.3.1.2
Normal Mode PWM Operation
8.3.2
Synchronous Buck Converters Buck2 And Buck3
8.3.3
BOOST Converter
8.3.4
Frequency-Hopping Spread Spectrum
8.3.5
Linear Regulator LDO
8.3.6
Gate Driver Supply
8.4
Device Functional Modes
8.4.1
RESET
8.4.2
Soft Start
8.4.3
INIT
8.4.4
TESTSTART
8.4.5
TESTSTOP
8.4.6
VTCHECK
8.4.7
RAMP
8.4.8
Power-Up Sequencing
8.4.9
Power-Down Sequencing
8.4.10
Active
8.4.11
ERROR
8.4.12
LOCKED
8.4.13
LPM0
8.4.14
Shutdown
8.4.14.1
Power-On Reset Flag
8.4.15
Wake Pin
8.4.16
IRQ Pin
8.4.17
VBAT Undervoltage Warning
8.4.18
VIN Over Or Undervoltage Protection
8.4.19
External Protection
8.4.20
Overtemperature Detection And Shutdown
8.4.21
Independent Voltage Monitoring
8.4.22
GND Loss Detection
8.4.23
Reference Voltage
8.4.24
Shutdown Comparator
8.4.25
LED And High-Side Switch Control
8.4.26
Window Watchdog
8.4.27
Timeout In Start-Up Modes
8.5
Programming
8.5.1
SPI
8.5.1.1
FSI Bit
8.6
Register Maps
8.6.1
Register Description
8.6.2
NOP0X00
8.6.2.1
SPI_SCK_FAIL 0x03
8.6.2.2
LPMO_CMD 0x11
8.6.2.3
LOCK_CMD 0x12
8.6.2.4
PWR_STAT 0x21
8.6.2.5
SYS_STAT 0x22
8.6.2.6
SPI_STAT 0x23
8.6.2.7
COMP_STAT 0x24
8.6.2.8
DEV_REV 0x2F
8.6.2.9
PWR_CONFIG 0x31
8.6.2.10
DEV_CONFIG 0x32
8.6.2.11
CLOCK_CONFIG 0x33
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Buck Controller 1
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.2.1
Adjusting the Output Voltage for the BUCK1 Controller
9.2.1.2.2
Output Inductor, Sense Resistor and Capacitor Selection for the BUCK1 Controller
9.2.1.2.3
Compensation of the Buck Controller
9.2.1.2.4
Bootstrap Capacitor for the BUCK1 Controller
9.2.1.3
BUCK 1 Application Curve
9.2.2
Synchronous Buck Converters BUCK2 and BUCK3
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.2.2.1
Adjusting the Output Voltage for the BUCK2 and BUCK3 Converter
9.2.2.2.2
Output Inductor Selection for the BUCK2 and BUCK3 Converter
9.2.2.2.3
Compensation of the BUCK2 and BUCK3 Converters
9.2.2.2.4
Bootstrap Capacitor for the BUCK2/3 Converters
9.2.2.3
Application Curves
9.2.3
BOOST Converter
9.2.3.1
Design Requirements
9.2.3.2
Detailed Design Procedure
9.2.3.2.1
Adjusting the Output Voltage for the Boost Converter
9.2.3.2.2
Output Inductor and Capacitor Selection for the BOOST Converter
9.2.3.2.3
Compensation of the BOOST Converter
9.2.3.2.4
Output Diode for the BOOST Converter
9.2.3.3
BOOST Converter Application Curves
9.2.4
Linear Regulator
9.2.4.1
Design Requirements
9.2.4.2
Detailed Design Procedure
9.2.4.2.1
Adjusting the Output Voltage for the Linear Regulator
9.2.4.2.2
Output Capacitance for the Linear Regulator
9.2.4.3
Linear Regulator Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
Buck Controller
11.1.2
Buck Converter
11.1.3
Boost Converter
11.1.4
Linear Regulator
11.1.5
Other Considerations
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
サポート・リソース
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RVJ|56
MPQF275D
サーマルパッド・メカニカル・データ
RVJ|56
QFND385A
発注情報
jajsnj1h_oa
jajsnj1h_pm
9.2.2.2
Detailed Design Procedure