10 Parameter Measurement Information

Figure 10-1 VIN Rising and Falling Ranges (With EXTSUP Supplied by VBOOST and V_BUCK1 = 3.3 V)

Figure 10-2 VIN Rising and Falling Ranges (With EXTSUP Not Present or Connected, and V_BUCK1 = 3.3 V)

Figure 10-3 Modulated SYNC Input Clock (General Example With ±14% Variation and 100-kHz Steps)

Figure 10-4 Regulator Load-Step Response

Table 10-1 Regulator LC Selection

REGULATOR	PARAMETER	CFG1	CFG2	CFG3	CFG4	CFG5	CFG6	CGF7	CGF8
BUCK1	V_OUT	3.6 V	3.3 V	3.3 V	3.3 V	3.3 V	3.6 V	3.6 V	3.6 V
BUCK1	L⁽¹⁾	2.2 µH	2.2 µH	2.2 µH	2.2 µH	2.2 µH	2.2 µH	2.2 µH	2.2 µH
BUCK2	V_OUT	1.25 V	2.3 V	1.2 V	1.25 V	1.8 V	2.3 V	1.2 V	1.8 V
BUCK2	L⁽¹⁾	1.0 µH	1.0 µH	1.0 µH	1.0 µH	1.0 µH	1.0 µH	1.0 µH	1.0 µH
BOOST	V_OUT	5 V
BOOST	L⁽¹⁾	1.5 µH	1.5 µH	1.5 µH	1.5 µH	1.5 µH	1.5 µH	1.5 µH	1.5 µH
ALL	f_SW	2.2 MHz	2.2 MHz	2.2 MHz	2.2 MHz	2.2 MHz	2.2 MHz	2.2 MHz	2.2 MHz
	ESR_MAX	10 mΩ
	C_{OUT_MIN}⁽²⁾	25 µF
	C_{OUT_MAX}⁽²⁾	100 µF
	C_{BOOTx_MIN}	100 nF

(1) Inductor variation is ±30% (including 10% variation for standard component-value selection).

(2) The C_{OUT_MIN} and C_{OUT_MAX} parameters are the total capacitance values and proper capacitor selection must consider capacitor variation and derating.