JAJSEF7G
December 2014 – February 2019
TPS659037
PRODUCTION DATA.
1
デバイスの概要
1.1
特長
1.2
アプリケーション
1.3
概要
1.4
ブロック概略図
2
改訂履歴
3
Pin Configuration and Functions
Pin Functions
4
Specifications
4.1
Absolute Maximum Ratings
4.2
ESD Ratings
4.3
Recommended Operating Conditions
4.4
Thermal Information
4.5
Electrical Characteristics: Latch Up Rating
4.6
Electrical Characteristics: LDO Regulator
4.7
Electrical Characteristics: Dual-Phase (SMPS12 and SMPS45) and Triple-Phase (SMPS123 and SMPS457) Regulators
4.8
Electrical Characteristics: Stand-Alone Regulators (SMPS3, SMPS6, SMPS7, SMPS8, and SMPS9)
4.9
Electrical Characteristics: Reference Generator (Bandgap)
4.10
Electrical Characteristics: 16-MHz Crystal Oscillator, 32-kHz RC Oscillator, and Output Buffers
4.11
Electrical Characteristics: DC-DC Clock Sync
4.12
Electrical Characteristics: 12-Bit Sigma-Delta ADC
4.13
Electrical Characteristics: Thermal Monitoring and Shutdown
4.14
Electrical Characteristics: System Control Threshold
4.15
Electrical Characteristics: Current Consumption
4.16
Electrical Characteristics: Digital Input Signal Parameters
4.17
Electrical Characteristics: Digital Output Signal Parameters
4.18
Electrical Characteristics: I/O Pullup and Pulldown
4.19
I2C Interface Timing Requirements
4.20
SPI Timing Requirements
4.21
Typical Characteristics
5
Detailed Description
5.1
Overview
5.2
Functional Block Diagram
5.3
Feature Description
5.3.1
Power Management
5.3.2
Power Resources (Step-Down and Step-Up SMPS Regulators, LDOs)
5.3.2.1
Step-Down Regulators
5.3.2.1.1
Sync Clock Functionality
5.3.2.1.2
Output Voltage and Mode Selection
5.3.2.1.3
Current Monitoring and Short Circuit Detection
5.3.2.1.4
POWERGOOD
5.3.2.1.5
DVS-Capable Regulators
5.3.2.1.6
Non DVS-Capable Regulators
5.3.2.1.7
Step-Down Converters SMPS12 and SMPS123
a. Dual-Phase SMPS and Stand-Alone SMPS
b. Triple Phase SMPS
5.3.2.1.8
Step-Down Converter SMPS45 and SMPS457
5.3.2.1.9
Step-Down Converters SMPS3, SMPS6, SMPS7, SMPS8, and SMPS9
5.3.2.2
LDOs – Low Dropout Regulators
5.3.2.2.1
LDOVANA
5.3.2.2.2
LDOVRTC
5.3.2.2.3
LDO Bypass (LDO9)
5.3.2.2.4
LDOUSB
5.3.2.2.5
Other LDOs
5.3.3
Long-Press Key Detection
5.3.4
RTC
5.3.4.1
General Description
5.3.4.2
Time Calendar Registers
5.3.4.2.1
TC Registers Read Access
5.3.4.2.2
TC Registers Write Access
5.3.4.3
RTC Alarm
5.3.4.4
RTC Interrupts
5.3.4.5
RTC 32-kHz Oscillator Drift Compensation
5.3.5
GPADC – 12-Bit Sigma-Delta ADC
5.3.5.1
Asynchronous Conversion Request (SW)
5.3.5.2
Periodic Conversion Request (AUTO)
5.3.5.3
Calibration
5.3.6
General-Purpose I/Os (GPIO Pins)
5.3.6.1
REGEN Output
5.3.7
Thermal Monitoring
5.3.7.1
Hot-Die Function (HD)
5.3.7.2
Thermal Shutdown (TS)
5.3.7.3
Temperature Monitoring With External NTC Resistor or Diode
5.3.8
Interrupts
5.3.9
Control Interfaces
5.3.9.1
I2C Interfaces
5.3.9.1.1
I2C Implementation
5.3.9.1.2
F/S Mode Protocol
5.3.9.1.3
HS Mode Protocol
5.3.9.2
Serial-Peripheral Interface (SPI)
5.3.9.2.1
SPI Modes
5.3.9.2.2
SPI Protocol
5.3.10
Device Identification
5.4
Device Functional Modes
5.4.1
Embedded Power Controller
5.4.2
State Transition Requests
5.4.2.1
ON Requests
5.4.2.2
OFF Requests
5.4.2.3
SLEEP and WAKE Requests
5.4.3
Power Sequences
5.4.4
Startup Timing and RESET_OUT Generation
5.4.5
Power On Acknowledge
5.4.5.1
POWERHOLD Mode
5.4.5.2
AUTODEVON Mode
5.4.6
BOOT Configuration
5.4.6.1
Boot Pin Selection
5.4.7
Reset Levels
5.4.8
Warm Reset
5.4.9
RESET_IN
5.4.10
Watchdog Timer (WDT)
5.4.11
System Voltage Monitoring
5.4.11.1
Generating a POR
6
Application and Implementation
6.1
Application Information
6.2
Typical Application
6.2.1
Design Requirements
6.2.2
Detailed Design Procedure
6.2.2.1
Recommended External Components
6.2.2.2
SMPS Input Capacitors
6.2.2.3
SMPS Output Capacitors
6.2.2.4
SMPS Inductors
6.2.2.5
LDO Input Capacitors
6.2.2.6
LDO Output Capacitors
6.2.2.7
VCC1
6.2.2.7.1
Meeting the Power Down Sequence
6.2.2.7.2
Maintaining Sufficient Input Voltage
6.2.2.8
VIO_IN
6.2.2.9
16-MHz Crystal
6.2.2.10
GPADC
6.2.3
Application Curves
7
Power Supply Recommendations
8
Layout
8.1
Layout Guidelines
8.2
Layout Example
9
デバイスおよびドキュメントのサポート
9.1
デバイス・サポート
9.1.1
Third-Party Products Disclaimer
9.2
ドキュメントのサポート
9.2.1
関連資料
9.3
ドキュメントの更新通知を受け取る方法
9.4
Community Resources
9.5
商標
9.6
静電気放電に関する注意事項
9.7
Glossary
10
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
ZWS|169
MPBGAK4B
サーマルパッド・メカニカル・データ
発注情報
jajsef7g_oa
jajsef7g_pm
4.5
Electrical Characteristics: Latch Up Rating
Over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I
LU
Latch up current, Class 2
I
2
C and SPI pins
90
mA
LDOVANA_OUT pin
–60
All other pins
100