JAJSFH6D May 2018 – October 2022 TPS65987D
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
RPPCC | PP_CABLE to C_CCn power switch resistance | 4.7 ≤ PP_CABLE ≤ 5.5 | 222 | 325 | mΩ | |
2.95 ≤ PP_CABLE < 4.7 | 269 | 414 | mΩ | |||
RPPHV | PP_HVx to VBUSx power switch resistance | Tj = 25C | 25 | 33 | mΩ | |
IPPHV | Continuous current capabillity of power path from PP_HVx to VBUSx | 5 | A | |||
IPPCC | Continuous current capabillity of power path from PP_CABLE to C_CCn | TJ = 125C | 320 | mA | ||
TJ = 85C | 600 | mA | ||||
IHVACT | Active quiescent current from PP_HV pin, EN_HV = 1 | Source Configuration, Comparator RCP function enabled, ILOAD = 100mA | 1 | mA | ||
IHVSD | Shutdown quiescent current from PP_HV pin, EN_HV = 0 | VPPHV = 20V | 100 | µA | ||
IOCC | Over Current Clamp Firmware Selectable Settings | 1.140 | 1.267 | 1.393 | A | |
1.380 | 1.533 | 1.687 | A | |||
1.620 | 1.800 | 1.980 | A | |||
1.860 | 2.067 | 2.273 | A | |||
2.100 | 2.333 | 2.567 | A | |||
2.34 | 2.600 | 2.860 | A | |||
2.580 | 2.867 | 3.153 | A | |||
2.820 | 3.133 | 3.447 | A | |||
3.060 | 3.400 | 3.74 | A | |||
3.300 | 3.667 | 4.033 | A | |||
3.540 | 3.933 | 4.327 | A | |||
3.780 | 4.200 | 4.620 | A | |||
4.020 | 4.467 | 4.913 | A | |||
4.260 | 4.733 | 5.207 | A | |||
4.500 | 5.00 | 5.500 | A | |||
4.740 | 5.267 | 5.793 | A | |||
4.980 | 5.533 | 6.087 | A | |||
5.220 | 5.800 | 6.380 | A | |||
5.460 | 6.067 | 6.673 | A | |||
5.697 | 6.330 | 6.963 | A | |||
IOCP | PP_HV Quick Response Current Limit | 10 | A | |||
ILIMPPCC | PP_CABLE current limit | 0.6 | 0.75 | 0.9 | A | |
IHV_ACC 1 | PP_HV current sense accuracy | I = 100 mA, Reverse current blocking disabled | 3.9 | 6 | 8.1 | A/V |
IHV_ACC 1 | PP_HV current sense accuracy | I = 200 mA | 4.8 | 6 | 7.2 | A/V |
IHV_ACC 1 | PP_HV current sense accuracy | I = 500 mA | 5.28 | 6 | 6.72 | A/V |
IHV_ACC 1 | PP_HV current sense accuracy | I ≥ 1 A | 5.4 | 6 | 6.6 | A/V |
tON_HV | PP_HV path turn on time from enable to VBUS = 95% of PP_HV voltage | Configured as a source or as a sink with soft start disabled. PP_HV = 20 V, CVBUS = 10 µF, ILOAD = 100 mA | 8 | ms | ||
tON_FRS | PP_HV path turn on time from enable to VBUS = 95% of PP_HV voltage during an FRS enable | Configured as a source. PP_HV = 5 V, CVBUS = 10 µF, ILOAD = 100 mA | 150 | μs | ||
tON_CC | PP_CABLE path turn on time from enable to C_CCn = 95% of the PP_CABLE voltage | PP_CABLE = 5 V, C_CCn = 500 nF, ILOAD = 100 mA | 2 | ms | ||
SS | Configurable soft start slew rate for sink configuration | ILOAD = 100mA, setting 0 | 0.270 | 0.409 | 0.45 | V/ms |
ILOAD = 100mA, setting 1 | 0.6 | 0.787 | 1 | V/ms | ||
ILOAD = 100mA, setting 2 | 1.2 | 1.567 | 1.7 | V/ms | ||
ILOAD = 100mA, setting 3 | 2.3 | 3.388 | 3.6 | V/ms | ||
VREVPHV | Reverse current blocking voltage threshold for PP_HV switch | Diode Mode | 6 | 10 | mV | |
Comparator Mode | 3 | 6 | mV | |||
VSAFE0V | Voltage that is a safe 0 V per USB-PD specification | 0 | 0.8 | V | ||
tSAFE0V | Voltage transition time to VSAFE0V | 650 | ms | |||
SRPOS | Maximum slew rate for positive voltage transitions | 0.03 | V/µs | |||
SRNEG | Maximum slew rate for negative voltage transitions | –0.03 | V/µs | |||
tSTABLE | EN to stable time for both positive and negative voltage transitions | 275 | ms | |||
VSRCVALID | Supply output tolerance beyond VSRCNEW during time tSTABLE | –0.5 | 0.5 | V | ||
VSRCNEW | Supply output tolerance | –5 | 5 | % | ||
tVCONNDIS | Time from cable detach to VVCONNDIS | 250 | ms | |||
VVCONNDIS | Voltage at which VCONN is considered discharged | 150 | mV |