JAJS385T
May 2001 – December 2022
TPS715
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
Thermal Information
6.4
Electrical Characteristics
6.5
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagrams
7.3
Feature Description
7.3.1
Wide Supply Range
7.3.2
Low Quiescent Current
7.3.3
Dropout Voltage (VDO)
7.3.4
Current Limit
7.4
Device Functional Modes
7.4.1
Normal Operation
7.4.2
Dropout Operation
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Detailed Design Procedure
8.2.1.1
Setting VOUT for the TPS71501 Adjustable LDO
8.2.1.2
External Capacitor Requirements
8.2.1.3
Input and Output Capacitor Requirements
8.2.1.4
Reverse Current
8.2.1.5
Feed-Forward Capacitor (CFF)
8.2.1.6
Power Dissipation (PD)
8.2.1.7
Estimating Junction Temperature
8.2.2
Application Curves
8.3
Best Design Practices
8.4
Power Supply Recommendations
8.5
Layout
8.5.1
Layout Guidelines
8.5.1.1
Power Dissipation
8.5.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
Development Support
9.1.1.1
Evaluation Module
9.1.1.2
Spice Models
9.1.2
Device Nomenclature
9.2
Documentation Support
9.2.1
Related Documentation
9.3
Receiving Notification of Documentation Updates
9.4
サポート・リソース
9.5
Trademarks
9.6
Electrostatic Discharge Caution
9.7
Glossary
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DCK|5
MPDS025J
サーマルパッド・メカニカル・データ
発注情報
jajs385t_oa
jajs385t_pm
8.2
Typical Application
Figure 8-1
Typical Application Circuit (Fixed-Voltage Version)
Figure 8-2
TPS71501 Adjustable LDO Regulator Programming