JAJSGW8B October   2014  – February 2019 TPS735-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current-Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Startup and Noise Reduction Capacitor
      5. 7.3.5 Transient Response
      6. 7.3.6 Undervoltage Lockout (UVLO)
      7. 7.3.7 Minimum Load
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Input and Output Capacitor Requirements
        2. 8.2.1.2 Feedback Capacitor Requirements (TPS73501-Q1 only)
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Noise
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
      2. 10.1.2 Thermal Protection
      3. 10.1.3 Package Mounting
      4. 10.1.4 Power Dissipation
      5. 10.1.5 Estimating Junction Temperature
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デバイスの項目表記
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DRB|8
サーマルパッド・メカニカル・データ
発注情報

6.6 Typical Characteristics

Over operating temperature range (–40°C ≤ TJ, TA ≤ 125°C), VIN = VOUTnom + 0.5 V or 2.7 V (whichever is greater), IOUT = 1 mA, VEN = VIN, COUT = 2.2 μF, and CNR = 0.01 μF, unless otherwise noted. TA = 25°C, unless otherwise noted.
TPS735-Q1 tc_line_reg_73501_sbvs252.gif
IOUT = 100 mA
Figure 1. TPS73501-Q1 Line Regulation
TPS735-Q1 tc_load_reg_73501_sbvs252.gif
The y-axis range is ±2% of 2.8 V
Figure 3. TPS73501-Q1 Load Regulation
TPS735-Q1 tc_ignd_iout_sbvs252.gif
Figure 5. TPS73525-Q1 Ground Pin Current vs
Output Current
TPS735-Q1 tc_vdo_io_slvscd4.gif
Figure 7. TPS73501-Q1 Dropout Voltage vs Output Current
TPS735-Q1 tc_psrr_fqcy_05v_sbvs252.gif
Figure 9. Power-Supply Ripple Rejection vs Frequency (VIN – VOUT = 0.5 V)
TPS735-Q1 tc_noise_cnr_sbvs252.gif
Figure 11. TPS73525-Q1 RMS Noise vs CNR
TPS735-Q1 tc_line_reg_73525_sbvs252.gif
IOUT = 100 mA
Figure 2. TPS73525-Q1 Line Regulation
TPS735-Q1 tc_load_reg_73525_sbvs252.gif
The y-axis range is ±2% of 2.5 V
Figure 4. TPS73525-Q1 Load Regulation
TPS735-Q1 tc_ignd_disable_temp_sbvs252.gif
VEN = 0.4 V
Figure 6. TPS73525-Q1 Ground Pin Current (Disable) vs Temperature
TPS735-Q1 tc_psrr_fqcy_1v_sbvs252.gif
Figure 8. Power-Supply Ripple Rejection vs Frequency
(VIN – VOUT = 1 V)
TPS735-Q1 tc_psrr_fqcy_03v_sbvs252.gif
Figure 10. Power-Supply Ripple Rejection vs Frequency (VIN – VOUT = 0.3 V)
TPS735-Q1 tc_noise_cout_sbvs252.gif
CNR = 0.01 µF, IOUT = 1 mA
Figure 12. TPS73525-Q1 RMS Noise vs COUT