JAJS408M June   2008  – June 2018 TPS735

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     代表的なアプリケーション
  4. 4 改訂履歴
    1.     Pin Configuration and Functions
      1.      Pin Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  6. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Internal Current Limit
      2. 6.3.2 Shutdown
      3. 6.3.3 Dropout Voltage
      4. 6.3.4 Start-Up and Noise Reduction Capacitor
      5. 6.3.5 Transient Response
      6. 6.3.6 Undervoltage Lockout
      7. 6.3.7 Minimum Load
      8. 6.3.8 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  7. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Input and Output Capacitor Requirements
        2. 7.2.1.2 Feed-Forward Capacitor Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Output Noise
      3. 7.2.3 Application Curves
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
      1. 9.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
    2. 9.2 Layout Example
    3. 9.3 Power Dissipation
    4. 9.4 Estimating Junction Temperature
    5. 9.5 Package Mounting
  10. 10デバイスおよびドキュメントのサポート
    1. 10.1 デバイス・サポート
      1. 10.1.1 開発サポート
        1. 10.1.1.1 評価モジュール
      2. 10.1.2 デバイスの項目表記
    2. 10.2 ドキュメントのサポート
      1. 10.2.1 関連資料
    3. 10.3 商標
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 Glossary
  11. 11メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

Pin Configuration and Functions

DRB Package
8-Pin SON With Exposed Thermal Pad
Top View
TPS735 DRB_pinout_TPS735xx.gif
DRV Package
6-Pin WSON With Exposed Thermal Pad
Top View
TPS735 DRV-Pinout.gif
NC - No internal connection

Pin Functions

PIN I/O DESCRIPTION
NAME NO
DRV DRB
IN 6 8 I Input supply. A 0.1-µF to 1-µF, low ESR capacitor must be placed from this pin to ground near the device.
GND 3 4 — Ground. The pad must be tied to GND.
EN 4 5 I Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. The EN pin can be connected to the IN pin if not used.
NR 2 3 — This pin is only available for the fixed voltage versions. Connecting an external capacitor to this pin bypasses noise that is generated by the internal band gap and allows the output noise to be reduced to very low levels. The maximum recommended capacitor is 0.01 μF.
FB 2 3 I This pin is only available for the adjustable version. The FB pin is the input to the control-loop error amplifier, and is used to set the output voltage of the device. This pin must not be left floating.
OUT 1 1 O This pin is the output of the regulator. A small, 2.2-μF ceramic capacitor is required from this pin to ground to assure stability. The minimum output capacitance required for stability is 2 µF.
NC 5 2, 6, 7 — Not internally connected.
Thermal pad —