JAJS189U January   2006  – September 2024 TPS737

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Noise
      2. 6.3.2 Internal Current Limit
      3. 6.3.3 Enable Pin and Shutdown
      4. 6.3.4 Reverse Current
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input and Output Capacitor Requirements
        2. 7.2.2.2 Dropout Voltage
        3. 7.2.2.3 Transient Response
      3. 7.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Power Dissipation
        2. 7.5.1.2 Thermal Protection
        3. 7.5.1.3 Estimating Junction Temperature
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Modules
        2. 8.1.1.2 Spice Models
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DCQ|6
  • DRV|6
  • DRB|8
サーマルパッド・メカニカル・データ
発注情報

5.6 Electrical Characteristics

Over operating temperature range (TJ = –40°C to 125°C), VIN = VOUT(nom) + 1V(1), IOUT = 10mA, VEN = 2.2V, and COUT = 2.2µF (unless otherwise noted). Typical values are at TJ = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage range(1)(2) 2.2 5.5 V
VFB Internal reference (DCQ package)  TJ = 25°C 1.198 1.204 1.21 V
VFB Internal reference (DRB and DRV packages)  TJ = 25°C 1.192 1.204 1.216 V
VOUT Output voltage range (TPS73701)(3) VFB 5.5 - VDO V
Accuracy(1)(4) Nominal  TJ = 25°C –1 1 %
5.36V < VIN < 5.5V, VOUT = 5.08V,
10mA < IOUT < 800mA,
–40°C < TJ < 85°C, TPS73701 (DCQ)		 –2 2
over VIN, IOUT, and T   VOUT + 0.5V ≤ VIN ≤ 5.5V; 10mA ≤ IOUT ≤ 1A, legacy silicon –3 ±0.5 3
VOUT + 0.5V ≤ VIN ≤ 5.5V; 10mA ≤ IOUT ≤ 1A, new silicon –1.5 ±0.5 1.5
ΔVOUT(ΔVIN) Line regulation(1) VOUT(nom) + 0.5V ≤ VIN ≤ 5.5V 0.01 %/V
ΔVOUT(ΔIOUT) Load regulation 1mA ≤ IOUT ≤ 1A 0.002 %/mA
ΔVOUT(ΔIOUT) Load regulation 10mA ≤ IOUT ≤ 1 A 0.0005 %/mA
VDO Dropout voltage(5) (VIN = VOUT(nom) - 0.1V) IOUT = 1A, legacy silicon 130 500 mV
VDO Dropout voltage(5) (VIN = VOUT(nom) - 0.1V) IOUT = 1A, new silicon 122 250 mV
ZO(DO) Output impedance in dropout 2.2V ≤ VIN ≤ VOUT + VDO 0.25 Ω
ICL Output current limit VOUT = 0.9 × VOUT(nom)  1.05 1.6 2.2 A
ISC Short-circuit current VOUT = 0V, legacy silicon 450 mA
ISC Short-circuit current VOUT = 0V, new silicon   510 mA
IREV Reverse leakage current(6) (-IIN) VEN ≤ 0.5V, 0V ≤ VIN ≤ VOUT  0.1 µA
IGND Ground pin current IOUT = 10mA (IQ)   400 µA
IGND Ground pin current IOUT = 1A, legacy silicon    1300 µA
IGND Ground pin current IOUT = 1A, new silicon    880 µA
ISHDN Shutdown current (IGND) VEN ≤ 0.5V, VOUT ≤ VIN ≤ 5.5V    20 nA
IFB Feedback pin current (TPS73701) 0.1 0.6 µA
PSRR Power-supply rejection ratio (ripple rejection) f = 100Hz, IOUT = 1A  58 dB
f = 10kHz, IOUT = 1A 37
VN Output noise voltage, BW = 10Hz to 100kHz COUT = 10µF 27 x VOUT µVRMS
tSTR Startup time VOUT = 3V, RL = 30Ω, COUT = 1μF, legacy silicon 600 µs
tSTR Startup time VOUT = 3V, RL = 30Ω, COUT = 1μF, new silicon    431 µs
VEN(high) EN pin high (enabled) 1.7 VIN V
VEN(low) EN pin low (shutdown) 0 0.5 V
IEN Enable pin current (enabled) VEN = 5.5V  20 nA
TSD Thermal shutdown temperature Shutdown, temperature increasing 160 °C
Reset, temperature decreasing 140
TJ Operating junction temperature –40 125 ℃
(1) Minimum VIN = VOUT + VDO or 2.2V, whichever is greater.
(2) For VOUT(nom) < 1.6V, when VIN ≤ 1.6V, the output locks to VIN and may result in a damaging over-voltage condition on the output. To avoid this situation, disable the device before powering down VIN. (Legacy silicon only)
(3) TPS73701 is tested at VOUT = 1.2V.
(4) Tolerance of external resistors not included in this specification.
(5) VDO is not measured for output versions with VOUT(nom) < 2.3V, because minimum VIN = 2.2V.
(6) Fixed-voltage versions only; refer to Application Information section for more information.