JAJSN90A december   2022  – may 2023 TPS748A-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics: IOUT = 50 mA
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable and Shutdown
      2. 7.3.2 Active Discharge
      3. 7.3.3 Power-Good Output (PG)
      4. 7.3.4 Internal Current Limit
      5. 7.3.5 Thermal Shutdown Protection (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input, Output, and Bias Capacitor Requirements
      2. 8.1.2 Dropout Voltage
      3. 8.1.3 Output Noise
      4. 8.1.4 Estimating Junction Temperature
      5. 8.1.5 Soft Start, Sequencing, and Inrush Current
      6. 8.1.6 Power-Good Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

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メカニカル・データ（パッケージ｜ピン）
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サーマルパッド・メカニカル・データ
発注情報

6.6 Typical Characteristics: IOUT = 50 mA

at TJ = 25°C, VIN = VOUT(nom) + 0.3 V, VBIAS = 5 V, IOUT = 50 mA, VEN = VIN, CIN = 1 μF, CBIAS = 4.7 μF, and COUT = 10 μF (unless otherwise noted)

GUID-20221118-SS0I-2LS5-JZBF-80VN2LPQBNSS-low.png
VOUT = 0.8 V, IOUT = 1.5 A, CBIAS = 0.1 μF, COUT = 10 μF,
CSS = 10 nF, VEN = VBIAS = 6 V
Figure 6-1 IN PSRR vs Frequency and VIN
GUID-20221118-SS0I-7TTW-V7TT-7HMCLQSTCKNQ-low.png
VIN = 1.1 V, VOUT = 0.8 V, CBIAS = 0.1 μF, COUT = 10 μF,
CSS = 10 nF, VEN = VBIAS = 6 V
Figure 6-3 IN PSRR vs Frequency and IOUT for VOUT = 0.8 V
GUID-20221118-SS0I-L29R-HF7M-MHFX2V4GJJF8-low.png
VIN = 3.6 V, VOUT = 3.3 V, CBIAS = 0.1 μF, COUT = 10 μF,
CSS = 10 nF, VEN = VBIAS = 6 V
Figure 6-5 IN PSRR vs Frequency and IOUT for VOUT = 3.3 V
GUID-20221118-SS0I-4B87-WCFH-7H3KNZCNDD5S-low.png
VIN = 1.1 V, VOUT = 0.8 V, IOUT = 1.5 A, CIN = 10 μF,
COUT = 10 μF, CSS = 10 nF, VEN = 6 V
Figure 6-7 BIAS PSRR vs Frequency and VBIAS
GUID-20221118-SS0I-H371-5J1D-S9Z9BBD2PCDF-low.png
VEN = VBIAS, VIN = 1.1 V, VOUT = 0.8 V, IOUT = 1.5 A,
CIN = 10 μF, COUT = 10 μF, CSS = 10 nF, CBIAS = 0.1 μF
Figure 6-9 Output Voltage Noise Density vs Frequency and VBIAS
GUID-20221205-SS0I-JZBM-HCNL-DFQ9K29HW9DC-low.png
VBIAS = 5 V, VOUT = 0.8 V
Figure 6-11 IN-to-OUT Dropout Voltage vs IOUT and Temperature (TJ)
GUID-20221205-SS0I-3QH3-ZMWZ-WKGHVHXNQKRW-low.png
VIN = 1.1 V, VBIAS = 5 V, VOUT = 0.8 V
Figure 6-13 Load Regulation vs 0-mA to 50-mA Output Current
GUID-20221205-SS0I-VHQJ-8ZKL-G2B4S91HGKTJ-low.png
VOUT = 0.8 V, VBIAS = 5 V, IOUT = 50 mA
Figure 6-15 Line Regulation vs Input Voltage
GUID-20221205-SS0I-8FJZ-0PL2-Z0H6CWRKMSD7-low.png
VOUT = 0.8 V, VBIAS = 5.0 V, IOUT = 50 mA
Figure 6-17 IN Pin Quiescent Current vs Input Voltage
GUID-20221205-SS0I-HCDF-1C0Q-NLRWTHBBZQWB-low.png
VOUT = 0.8 V, VBIAS = 5.0 V, IOUT = 1.5 A
Figure 6-19 BIAS Pin Quiescent Current vs Input Voltage
GUID-20221205-SS0I-FNZF-J4J3-FHPTGGV8WSBD-low.png
VBIAS = 5 V, VEN = 0 V
Figure 6-21 Shutdown Current (GND Pin) vs Input Voltage
GUID-20221205-SS0I-QSTM-NVNP-GJS5KNZRVGL4-low.png
 
Figure 6-23 Current Limit vs Output Voltage
GUID-20221118-SS0I-TVGD-69XW-QMRSH7NDGF1Q-low.png
VIN = 1.1 V, VOUT = 0.8 V, IOUT = 1.5 A, CBIAS = 0.1 μF,
COUT = 10 μF, VEN = VBIAS = 6 V
Figure 6-2 IN PSRR vs Frequency and CSS
GUID-20221209-SS0I-RGHR-KTMJ-1MP5QRVCNZZS-low.png
VIN = 2.1 V, VOUT = 1.8 V, CBIAS = 0.1 μF, COUT = 10 μF,
CSS = 10 nF, VEN = VBIAS = 6 V
Figure 6-4 PSRR vs Frequency and IOUT for VOUT = 1.8 V
GUID-20221118-SS0I-BWW9-P4ML-12R3MMWTZT4R-low.png
VIN = 1.1 V, VOUT = 0.8 V, IOUT = 1.5 A, CBIAS = 0.1 μF,
CSS = 10 nF, VEN = VBIAS = 6 V
Figure 6-6 IN PSRR vs Frequency and COUT
GUID-20221118-SS0I-ZKKD-MWNT-MCXPQSXKC16R-low.png
VEN = VIN = 1.1 V, VOUT = 0.8 V, IOUT = 1.5 A, CIN = 10 μF, COUT = 10 μF, CSS = 10 nF, VBIAS = 6 V
Figure 6-8 BIAS PSRR vs Frequency and IOUT
GUID-20221118-SS0I-P4DL-7NZT-K8KKQB2HH1GT-low.png
VEN = VBIAS, VIN = 1.1 V, VOUT = 0.8 V, CIN = 10 μF,
COUT = 10 μF, CSS = 10 nF, CBIAS = 0.1 μF
Figure 6-10 Output Voltage Noise Density vs Frequency and IOUT
GUID-20221205-SS0I-BQP1-HZNH-JM0HFLPPMP9W-low.png
VIN = 1.1 V, VOUT = 0.8 V
Figure 6-12 BIAS-to-OUT Dropout Voltage vs IOUT and Temperature (TJ)
GUID-20221205-SS0I-PDPH-NWV9-JPHB6Q38VWKS-low.png
VIN = 1.1 V, VBIAS = 5 V, VOUT = 0.8 V
Figure 6-14 Load Regulation vs ≥50-mA Output Current
GUID-20221205-SS0I-VSCZ-94FZ-R2WQL1FFCT07-low.png
VBIAS = 5 V, VOUT = 0.8 V, IOUT = 50 mA
Figure 6-16 Output Voltage vs Bias Voltage
GUID-20221205-SS0I-98JZ-DKMK-5JGMTRT7NXBX-low.png
VOUT = 0.8 V, VBIAS = 5.0 V
Figure 6-18 IN Pin Quiescent Current vs Output Current
GUID-20221205-SS0I-S6N6-DTLQ-XZBCXJPPBJDC-low.png
VIN = 1.1 V, VOUT = 0.8 V, VBIAS = 5.0 V
Figure 6-20 BIAS Pin Quiescent Current vs Output Current
GUID-20221205-SS0I-H0WF-MMTR-2RJCBCVNJZ1H-low.png
VIN = 1.1 V, VEN = 0 V
Figure 6-22 Shutdown Current (GND Pin) vs Bias Voltage