JAJSQT2E
August 1999 – March 2024
TPS766
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information (Legacy Chip)
5.5
Thermal Information (New Chip)
5.6
Electrical Characteristics
5.7
Timing Diagram
5.8
Typical Characteristics
5.9
Typical Characteristics: Supported ESR Range
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagrams
6.3
Feature Description
6.3.1
Output Enable
6.3.2
Dropout Voltage
6.3.3
Current Limit
6.3.4
Undervoltage Lockout (UVLO)
6.3.5
Power-Good Function
6.3.6
Output Pulldown
6.3.7
Thermal Shutdown
6.4
Device Functional Modes
6.4.1
Device Functional Mode Comparison
6.4.2
Normal Operation
6.4.3
Dropout Operation
6.4.4
Disabled
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Adjustable Device Feedback Resistors
7.2.2.2
Recommended Capacitor Types
7.2.2.3
Input and Output Capacitor Requirements
7.2.2.4
Reverse Current
7.2.2.5
Feed-Forward Capacitor (CFF)
7.2.2.6
Power Dissipation (PD)
7.2.2.7
Estimating Junction Temperature
7.2.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Device Nomenclature
8.2
ドキュメントの更新通知を受け取る方法
8.3
サポート・リソース
8.4
Trademarks
8.5
静電気放電に関する注意事項
8.6
用語集
9
Revision History
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
D|8
サーマルパッド・メカニカル・データ
発注情報
jajsqt2e_oa
jajsqt2e_pm
5.8
Typical Characteristics
Figure 5-2
TPS76633 Output Voltage vs Load Current
(Legacy Chip)
Figure 5-4
TPS76633 Output Voltage vs Load Current
(New Chip)
Figure 5-6
TPS76633 Output Voltage vs Free-Air Temperature (Legacy Chip)
Figure 5-8
TPS76615 Output Voltage vs Free-Air Temperature (Legacy Chip)
Figure 5-10
TPS76633 Ground Current vs Load Current
(New Chip)
Figure 5-12
TPS76615 Ground Current vs Load Current
(Legacy Chip)
Figure 5-14
TPS76633 Ground Current vs Free-Air Temperature (New Chip)
Figure 5-16
TPS76615 Ground Current vs Free-Air Temperature (Legacy Chip)
Figure 5-18
TPS76633 Current Limit vs Input Voltage
(New Chip)
Figure 5-20
TPS76650 Dropout Voltage vs Free-Air Temperature (Legacy Chip)
Figure 5-22
TPS76633 Dropout Voltage vs Free-Air Temperature (Legacy Chip)
Figure 5-24
TPS76633 Power-Supply Ripple Rejection vs Frequency (Legacy Chip)
Figure 5-26
TPS76633 Power-Supply Ripple Rejection vs
Frequency and Output Capacitor (New Chip)
Figure 5-28
TPS76633 Output Spectral Noise Density vs Frequency (Legacy Chip)
Figure 5-30
TPS76633 Output Spectral Noise Density vs
Frequency and Output Capacitor (New Chip)
Figure 5-32
TPS76633 Output Impedance vs Frequency (Legacy Chip)
Figure 5-34
TPS76633 Line Transient Response (Legacy Chip)
Figure 5-36
TPS76633 Line Transient Response (New Chip)
Figure 5-38
TPS76633 Load Transient Response (Legacy Chip)
Figure 5-40
TPS76633 Load Transient Response (New Chip)
Start-up with
EN
sequencing
Figure 5-42
TPS76633 Output Voltage vs Time (New Chip)
Start-up with V
IN
sequencing
Figure 5-44
TPS76633 Output Voltage vs Time (New Chip)
Figure 5-46
TPS76601 Dropout Voltage vs Input Voltage (Legacy Chip)
Figure 5-3
TPS76633 Output Voltage vs Load Current
(New Chip)
Figure 5-5
TPS76615 Output Voltage vs Load Current
(Legacy Chip)
Figure 5-7
TPS76633 Output Voltage vs Free-Air Temperature (New Chip)
Figure 5-9
TPS76633 Ground Current vs Load Current
(Legacy Chip)
Figure 5-11
TPS76633 Ground Current vs Load Current
(New Chip)
Figure 5-13
TPS76633 Ground Current vs Free-Air Temperature (Legacy Chip)
Figure 5-15
TPS76633 Ground Current vs Free-Air Temperature (New Chip)
Figure 5-17
TPS76633 Ground Current vs Input Voltage
(New Chip)
V
OUT
= 3.3 V
Figure 5-19
TPS76633 Current Limit vs Output Voltage
(New Chip)
Figure 5-21
TPS76650 Dropout Voltage vs Free-Air Temperature (New Chip)
Figure 5-23
TPS76633 Dropout Voltage vs Free-Air Temperature (New Chip)
Figure 5-25
TPS76633 Power-Supply Ripple Rejection vs
Frequency and Load Current (New Chip)
Figure 5-27
TPS76633 Power-Supply Ripple Rejection vs
Frequency and Input Voltage (New Chip)
Figure 5-29
TPS76633 Output Spectral Noise Density vs
Frequency and Load Current (New Chip)
Figure 5-31
TPS76633 Output Spectral Noise Density vs
Frequency and Input Voltage (New Chip)
Figure 5-33
TPS76615 Line Transient Response (Legacy Chip)
Figure 5-35
TPS76633 Line Transient Response (New Chip)
Figure 5-37
TPS76615 Load Transient Response (Legacy Chip)
Figure 5-39
TPS76633 Load Transient Response (New Chip)
Figure 5-41
TPS76633 Output Voltage vs Time (Legacy Chip)
Start-up with
EN
sequencing
Figure 5-43
TPS76633 Output Voltage vs Time (New Chip)
Start-up with V
IN
sequencing
Figure 5-45
TPS76633 Output Voltage vs Time (New Chip)