SBVS115D August   2008  – January 2015 TPS782

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Active VOUT Pulldown
      3. 7.3.3 Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Dropout Voltage
        3. 8.2.2.3 Transient Response
        4. 8.2.2.4 Minimum Load
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don’ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Protection
    4. 10.4 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Modules
        2. 11.1.1.2 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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7 Detailed Description

7.1 Overview

The TPS782 family of low-dropout regulators (LDOs) is designed specifically for battery-powered applications where ultralow quiescent current is a critical parameter. The TPS782 family is compatible with the TI MSP430 and other similar products. The enable pin (EN) is compatible with standard CMOS logic. This LDO family is stable with any output capacitor greater than 1.0 µF.

7.2 Functional Block Diagram

fbd_bvs115.gif

7.3 Feature Description

7.3.1 Internal Current Limit

The TPS782 is internally current-limited to protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current that is largely independent of output voltage. For reliable operation, the device should not be operated in a current limit state for extended periods of time.

The PMOS pass element in the TPS782 series has a built-in body diode that conducts current when the voltage at OUT exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated, external limiting to 5% of rated output current may be appropriate.

7.3.2 Active VOUT Pulldown

In the TPS782 series, the active pulldown discharges VOUT when the device is off. However, the input voltage must be greater than 2.2 V for the active pulldown to work.

7.3.3 Shutdown

The enable pin (EN) is active high and is compatible with standard and low-voltage CMOS levels. When shutdown capability is not required, EN should be connected to the IN pin, as shown in Figure 22. The TPS782 series, with internal active output pulldown circuitry, discharges the output to within 5% VOUT with a time (t) shown in Equation 1:

Equation 1. q_t_bvs115.gif

Where:

RL= output load resistance

COUT = output capacitance

ai_tie_en_bvs115.gifFigure 22. Circuit Showing EN Tied High When Shutdown Capability Is Not Required

7.4 Device Functional Modes

Table 1 provides a quick comparison between the normal, dropout, and disabled modes of operation.

Table 1. Device Functional Mode Comparison

OPERATING MODE PARAMETER
VIN EN IOUT TJ
Normal VIN > VOUT(nom) + VDO VEN > VEN(HI) IOUT < ILIM TJ < TSD
Dropout VIN < VOUT(nom) + VDO VEN > VEN(HI) IOUT < ILIM TJ < TSD
Disabled VEN < VEN(LO) TJ > TSD

7.4.1 Normal Operation

The device regulates to the nominal output voltage under the following conditions:

  • The input voltage is greater than the nominal output voltage plus the dropout voltage (VOUT(nom) + VDO).
  • The enable voltage has previously exceeded the enable rising threshold voltage and not yet decreased below the enable falling threshold.
  • The output current is less than the current limit (IOUT < ILIM).
  • The device junction temperature is less than the thermal shutdown temperature (TJ < TSD).

7.4.2 Dropout Operation

If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other conditions are met for normal operation, the device operates in dropout mode. In this mode, the output voltage tracks the input voltage. During this mode, the transient performance of the device becomes significantly degraded because the pass device is in a triode state and no longer controls the current through the LDO. Line or load transients in dropout can result in large output-voltage deviations.

7.4.3 Disabled

The device is disabled under the following conditions:

  • The enable voltage is less than the enable falling threshold voltage or has not yet exceeded the enable rising threshold.
  • The device junction temperature is greater than the thermal shutdown temperature (TJ > TSD).