JAJSNL3A December   2021  – May 2022 TPS7A13

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Excellent Transient Response
      2. 7.3.2 Global Undervoltage Lockout (UVLO)
      3. 7.3.3 Enable Input
      4. 7.3.4 Internal Foldback Current Limit
      5. 7.3.5 Active Discharge
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Mode
      2. 7.4.2 Dropout Mode
      3. 7.4.3 Disable Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Recommended Capacitor Types
      2. 8.1.2  Input, Output, and Bias Capacitor Requirements
      3. 8.1.3  Dropout Voltage
      4. 8.1.4  Behavior During Transition From Dropout Into Regulation
      5. 8.1.5  Device Enable Sequencing Requirement
      6. 8.1.6  Load Transient Response
      7. 8.1.7  Undervoltage Lockout Circuit Operation
      8. 8.1.8  Power Dissipation (PD)
      9. 8.1.9  Estimating Junction Temperature
      10. 8.1.10 Recommended Area for Continuous Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Module
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • YCK|6
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

Figure 5-1 YCK Package,6-Pin WCSP, 0.35-mm Pitch(Top View)
Table 5-1 Pin Functions
PIN TYPE DESCRIPTION
NO. NAME
A1 OUT Output Regulated output pin. A 1-µF or greater capacitance is required from OUT to ground for stability. For best transient response, use a 2.2-µF or larger ceramic capacitor from OUT to ground. Place the output capacitor as close to OUT as possible.
A2 IN Input Input pin. A 0.75-µF or greater capacitance is required from IN to ground for stability. For good transient response, use a 2.2-µF or larger ceramic capacitor from IN to ground. Place the input capacitor as close to input of the device as possible.
B1 SENSE Input SENSE input. This pin is a feedback input to the regulator for SENSE connections. Connecting SENSE to the load helps eliminate voltage errors resulting from trace resistance between OUT and the load.
B2 EN Input Enable pin. Driving this pin to logic high enables the LDO. Driving this pin to logic low disables the LDO. If enable functionality is not required, this pin must be connected to IN or BIAS.
C1 GND — Ground pin. This pin must be connected to ground.
C2 BIAS Input BIAS pin. This pin enables the use of low-input voltage, low-output voltage (LILO) conditions. For best performance, use a 0.1-µF or larger ceramic capacitor from BIAS to ground. Place the bias capacitor as close to BIAS as possible.