JAJSO94B june 2022 – august 2023 TPS7A15
PRODUCTION DATA
Dropout voltage (VDO) is defined as the input voltage minus the output voltage (VIN – VOUT) at the rated output current (IRATED), where the pass transistor is fully on. IRATED is the maximum IOUT listed in the Recommended Operating Conditions table. The pass transistor is in the ohmic or triode region of operation, and acts as a switch. The dropout voltage indirectly specifies a minimum input voltage greater than the nominal programmed output voltage at which the output voltage is expected to stay in regulation. If the input voltage falls to less than the nominal output regulation, then the output voltage falls as well.
For a CMOS regulator, the dropout voltage is determined by the drain-source, on-state resistance (RDS(ON)) of the pass transistor. Therefore, if the linear regulator operates at less than the rated current, the dropout voltage for that current scales accordingly. Use Equation 1 to calculate the RDS(ON) of the device.
Using a bias rail enables the TPS7A15 to achieve a lower dropout voltage between IN and OUT. However, a minimum bias voltage above the nominal programmed output voltage must be maintained. Figure 6-12 specifies the minimum VBIAS headroom required to maintain output regulation.