JAJSS47 August   2024 TPS7A20C

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Fast Settling
      2. 6.3.2 Low Output Noise
      3. 6.3.3 Dropout Voltage
      4. 6.3.4 Smart Enable
      5. 6.3.5 Current Limit
      6. 6.3.6 Undervoltage Lockout (UVLO)
      7. 6.3.7 Thermal Shutdown
      8. 6.3.8 Active Discharge
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Recommended Capacitor Types
      2. 7.1.2 Input and Output Capacitor Requirements
      3. 7.1.3 Load Transient Response
      4. 7.1.4 Undervoltage Lockout (UVLO) Operation
      5. 7.1.5 Power Dissipation (PD)
        1. 7.1.5.1 Estimating Junction Temperature
        2. 7.1.5.2 Recommended Area for Continuous Operation
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • YCK|4
サーマルパッド・メカニカル・データ
発注情報

7.1.5 Power Dissipation (PD)

Circuit reliability demands that proper consideration be given to device power dissipation, location of the circuit on the PCB, and correct thermal plane sizing. Make sure the printed circuit board (PCB) area around the regulator is as free as possible of other heat-generating devices that cause added thermal stresses.

As a first-order approximation, power dissipation in the regulator depends on the input-to-output voltage difference and load conditions. Use Equation 2 to approximate PD:

Equation 2. PD = (VIN – VOUT) × IOUT

Power dissipation is minimized, and thus greater efficiency achieved, by proper selection of the system voltage rails. Proper selection allows the minimum input-to-output voltage differential to be obtained. The low dropout of the TPS7A20C allows for maximum efficiency across a wide range of output voltages.

The maximum power dissipation determines the maximum allowable junction temperature (TJ) for the device. According to Equation 3, power dissipation and junction temperature are most often related by the RθJA of the combined PCB and device package and the TA. RθJA is the junction-to-ambient thermal resistance and TA is the ambient air temperature. Equation 4 rearranges Equation 3 for output current.

Equation 3. TJ = TA + (RθJA × PD)
Equation 4. IOUT = (TJ – TA) / [RθJA × (VIN – VOUT)]

Unfortunately, this thermal resistance (RθJA) is highly dependent on the heat-spreading capability built into the particular PCB design. Therefore, RθJA varies according to the total copper area, copper weight, and location of the planes. The RθJA recorded in the Thermal Information table is determined by the JEDEC standard, PCB, and copper-spreading area. RθJA is only used as a relative measure of package thermal performance. For a well-designed thermal layout, RθJA is actually the sum of RθJC(bot) plus the thermal resistance contribution by the PCB copper. RθJC(bot) is the package junction-to-case (bottom) thermal resistance.