JAJSQC0 January   2024 TPS7A20L

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Low Output Noise
      2. 6.3.2 Smart Enable
      3. 6.3.3 Dropout Voltage
      4. 6.3.4 Foldback Current Limit
      5. 6.3.5 Undervoltage Lockout (UVLO)
      6. 6.3.6 Thermal Shutdown
      7. 6.3.7 Active Discharge
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Recommended Capacitor Types
      2. 7.1.2 Input and Output Capacitor Requirements
      3. 7.1.3 Load Transient Response
      4. 7.1.4 Undervoltage Lockout (UVLO) Operation
      5. 7.1.5 Power Dissipation (PD)
        1. 7.1.5.1 Estimating Junction Temperature
        2. 7.1.5.2 Recommended Area for Continuous Operation
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.5 Electrical Characteristics

at operating temperature range (TJ = –40℃ to +125℃), VIN = VOUT(NOM) + 0.3 V or 1.6V, whichever is greater, VEN = 1.0 V, IOUT = 1 mA, CIN = 1 µF, COUT = 1 µF (unless otherwise noted); all typical values are at TJ = 25℃
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ΔVOUT Output voltage tolerance VIN = (VOUT(NOM) + 0.3 V) to 6.0 V,
IOUT = 1 mA to 300 mA, 
VOUT ≥ 1.85 V		 –1.5 1.5 %
VIN = (VOUT(NOM) + 0.5 V) to 6.0 V,
IOUT = 1 mA to 300 mA
VOUT < 1.85 V		 –30 30 mV
ΔVOUT Line regulation VIN = (VOUT(NOM) + 0.3 V) to 6.0 V,
IOUT = 1 mA		 0.03 %/V
ΔVOUT Load regulation IOUT = 1 mA to 300 mA  13 mV
IGND Quiescent ground current VEN = VIN = 6 V,
IOUT = 0 mA		 TJ = 25°C 6.5 8.5 µA
TJ = –40°C to 85°C 10
TJ = –40°C to 125°C 15
VEN = VIN = 6 V, IOUT = 300 mA 2000
ISHDN Shutdown ground current VEN = 0 V (disabled), VIN = 6.0 V, TJ = 25°C 0.07 0.2 µA
IGND(DO) IGND in dropout VIN ≤  VOUT(NOM) , IOUT = 0 mA, VEN = VIN 6.5 15 µA
VDO Dropout voltage IOUT = 300 mA,
VOUT = 95% x VOUT(NOM),
 		 0.8 V ≤ VOUT < 1.0 V(1) 690 mV
1.0 V ≤ VOUT < 1.2 V(1) 490
1.2 V ≤ VOUT < 1.5 V(1) 355
1.5 V ≤ VOUT < 2.5 V 200
2.5 V ≤ VOUT < 5.5 V 140
ICL  Output current limit VOUT = 0.9 x VOUT(NOM), 
VIN = VOUT(NOM) + 0.5 V 		 VOUT < 1.5 V   360 520 730 mA
VOUT = 0.9 x VOUT(NOM), 
VIN = VOUT(NOM) + 0.3 V 		 VOUT ≥ 1.5 V 360 520 730
ISC Short-circuit current limit VOUT = 0 V 160 mA
PSRR Power-supply rejection ratio IOUT = 20 mA,
VIN = VOUT + 1.0 V		 f = 100 Hz 95 dB
f = 1 kHz 95
f = 10 kHz 75
f = 100 kHz 75
f = 1 MHz 45
IOUT = 300 mA,
VIN = VOUT + 1.0 V		 f = 100 Hz 65
f = 1 kHz 92
f = 10 kHz 75
f = 100 kHz 60
f = 1 MHz 40
VN Output noise voltage BW = 10 Hz to 100 kHz,
VOUT = 2.8 V		 IOUT = 300 mA 7 µVRMS
IOUT = 1 mA 10
RPULLDOWN Output automatic discharge pulldown resistance VEN < VEN(LOW) (output disabled), VIN = 3.1 V 150 Ω
TSD Thermal shutdown TJ rising 165 °C
TJ falling 140
VEN(LOW)  Low input threshold VIN = 1.6 V to 6.0 V,
VEN falling until the output is disabled		 0.43 V
VEN(HI)  High input threshold VIN = 1.6 V to 6.0 V
VEN rising until the output is enabled		 0.75 V
VUVLO  UVLO threshold VIN rising 1.17 1.35 1.59 V
VIN falling 1.11 1.3 1.55
VUVLO(HYST) UVLO hysteresis 50 mV
IEN EN input leakage current VEN = 6.0 V and VIN = 6.0 V 90 250 nA
REN(PULL-DOWN) Smart enable pulldown resistor VEN = 0.25 V 500 KΩ
(1) Design simulation data only