JAJSGN3C December   2018  – December 2022 TPS7A25

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
  7. 7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Output Enable
      2. 8.3.2 Dropout Voltage
      3. 8.3.3 Current Limit
      4. 8.3.4 Undervoltage Lockout (UVLO)
      5. 8.3.5 Thermal Shutdown
      6. 8.3.6 Power Good
      7. 8.3.7 Active Overshoot Pulldown Circuitry
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Functional Mode Comparison
      2. 8.4.2 Normal Operation
      3. 8.4.3 Dropout Operation
      4. 8.4.4 Disabled
        1.       Application and Implementation
          1. 9.1 Application Information
            1. 9.1.1 Adjustable Device Feedback Resistors
            2. 9.1.2 Recommended Capacitor Types
            3. 9.1.3 Input and Output Capacitor Requirements
            4. 9.1.4 Reverse Current
            5. 9.1.5 Feed-Forward Capacitor (CFF)
            6. 9.1.6 Power Dissipation (PD)
            7. 9.1.7 Estimating Junction Temperature
            8. 9.1.8 Special Consideration for Line Transients
          2. 9.2 Typical Application
            1. 9.2.1 Design Requirements
            2. 9.2.2 Detailed Design Procedure
              1. 9.2.2.1 Transient Response
              2. 9.2.2.2 Selecting Feedback Divider Resistors
              3. 9.2.2.3 Thermal Dissipation
            3. 9.2.3 Application Curve
          3. 9.3 Power Supply Recommendations
          4. 9.4 Layout
            1. 9.4.1 Layout Guidelines
            2. 9.4.2 Layout Examples
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DRV|6
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

Figure 5-1 TPS7A25: DRV Package (Adjustable),6-Pin WSON(Top View)
Figure 5-2 TPS7A25: DRV Package (Fixed),6-Pin WSON(Top View)
Table 5-1 Pin Functions
PIN I/O DESCRIPTION
NAME DRV
(Adjustable)		 DRV
(Fixed)
EN 4 4 Input Enable pin. Drive EN greater than VEN(HI) to enable the regulator. Drive EN less than VEN(LOW) to put the regulator into low-current shutdown. Do not float this pin. If not used, connect EN to IN.
FB 2 — Input Feedback pin. Input to the control-loop error amplifier. This pin is used to set the output voltage of the device with the use of external resistors. For adjustable-voltage version devices only.
GND 5 5 — Ground pin.
IN 6 6 Input Input pin. For best transient response and to minimize input impedance, use the recommended value or larger capacitor from IN to ground as listed in the Recommended Operating Conditions table. Place the input capacitor as close to the IN and GND pins of the device as possible.
NC — 2 — No internal connection. For fixed-voltage version devices only. This pin can be floated but the device will have better thermal performance with this pin tied to GND.
OUT 1 1 Output Output pin. A capacitor is required from OUT to ground for stability. For best transient response, use the nominal recommended value or larger capacitor from OUT to ground. Follow the recommended capacitor value as listed in the Recommended Operating Conditions table. Place the output capacitor as close to the OUT and GND pins of the device as possible.
PG 3 3 Output Power-good pin; open-collector output. Pullup externally to the OUT pin or another voltage rail. The PG pin goes high when VOUT > VIT(PG,RISING) in the Electrical Characteristics table. The PG pin is driven low when VOUT < VIT(PG,FALLING) in the Electrical Characteristics table. If not used this pin can be floated but the device will have better thermal performance with this pin tied to GND.
Thermal pad Pad Pad — Exposed pad of the package. Connect this pad to ground or leave floating. Connect the thermal pad to a large-area ground plane for best thermal performance.