JAJSGN3C
December 2018 – December 2022
TPS7A25
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagrams
8.3
Feature Description
8.3.1
Output Enable
8.3.2
Dropout Voltage
8.3.3
Current Limit
8.3.4
Undervoltage Lockout (UVLO)
8.3.5
Thermal Shutdown
8.3.6
Power Good
8.3.7
Active Overshoot Pulldown Circuitry
8.4
Device Functional Modes
8.4.1
Device Functional Mode Comparison
8.4.2
Normal Operation
8.4.3
Dropout Operation
8.4.4
Disabled
Application and Implementation
9.1
Application Information
9.1.1
Adjustable Device Feedback Resistors
9.1.2
Recommended Capacitor Types
9.1.3
Input and Output Capacitor Requirements
9.1.4
Reverse Current
9.1.5
Feed-Forward Capacitor (CFF)
9.1.6
Power Dissipation (PD)
9.1.7
Estimating Junction Temperature
9.1.8
Special Consideration for Line Transients
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Transient Response
9.2.2.2
Selecting Feedback Divider Resistors
9.2.2.3
Thermal Dissipation
9.2.3
Application Curve
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Examples
9
Device and Documentation Support
9.1
Device Support
9.1.1
Device Nomenclature
9.2
Documentation Support
9.2.1
Related Documentation
9.3
Receiving Notification of Documentation Updates
9.4
サポート・リソース
9.5
Trademarks
9.6
Electrostatic Discharge Caution
9.7
Glossary
10
Mechanical, Packaging, and Orderable Information
10.1
Mechanical Data
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
DRV|6
サーマルパッド・メカニカル・データ
DRV|6
QFND087M
発注情報
jajsgn3c_oa
jajsgn3c_pm
9.2
Typical Application
Figure 9-4
Generating a 5-V Rail From a Multicell Power Bank