JAJSGI3B December   2011  – November 2018 TPS7A4101

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーションの図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable Pin Operation
      2. 7.3.2 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjustable Operation
      2. 8.1.2 Transient Voltage Protection
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Capacitor Recommendations
        2. 8.2.2.2 Input and Output Capacitor Requirements
        3. 8.2.2.3 Bypass Capacitor Requirements
        4. 8.2.2.4 Maximum AC Performance
        5. 8.2.2.5 Transient Response
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Thermal Considerations
      2. 10.1.2 Power Dissipation
      3. 10.1.3 Package Mounting
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

at TJ = –40°C to 125°C, VIN = VOUT(NOM) + 2 V or VIN = 7 V (whichever is greater), VEN = VIN, IOUT = 100 µA, CIN = 1 µF, COUT = 4.7 µF, and FB tied to OUT (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage range 7 50 V
VREF Internal reference TJ = 25°C, VFB = VREF, VIN = 9 V, IOUT = 25 mA 1.161 1.173 1.185 V
VOUT Output voltage range(1) VIN ≥ VOUT(NOM) + 2 V VREF 48 V
Nominal accuracy TJ = 25°C, VIN = 9 V, IOUT = 25 mA –1 1 %VOUT
Overall accuracy VOUT(NOM) + 2 V ≤ VIN ≤ 24 V(2)
100 µA ≤ IOUT ≤ 50 mA		 –2.5 2.5 %VOUT
ΔVO(ΔVI) Line regulation 7 V ≤ VIN ≤ 50 V 0.03 %VOUT
ΔVO(ΔVL) Load regulation 100 µA ≤ IOUT ≤ 50 mA 0.31 %VOUT
VDO Dropout voltage VIN = 17 V, VOUT(NOM) = 18 V, IOUT = 20 mA 290 mV
VIN = 17 V, VOUT(NOM) = 18 V, IOUT = 50 mA 0.78 1.3 V
ILIM Current limit VOUT = 90% VOUT(NOM), VIN = 7 V, TJ ≤ 85°C 51 117 200 mA
VOUT = 90% VOUT(NOM), VIN = 9 V 51 128 200
IGND Ground current 7 V ≤ VIN ≤ 50 V, IOUT = 0 mA 25 65 µA
IOUT = 50 mA 25
ISHDN Shutdown supply current VEN = 0.4 V 4.1 20 µA
I FB Feedback current(3) –0.1 0.01 0.1 µA
IEN Enable current 7 V ≤ VIN ≤ 50 V, VIN = VEN 0.02 1 µA
VEN_HI Enable high-level voltage 1.5 VIN V
VEN_LO Enable low- level voltage 0 0.4 V
VNOISE Output noise voltage VIN = 12 V, VOUT(NOM) = VREF, COUT = 10 µF,
BW = 10 Hz to 100 kHz		 58 µVRMS
VIN = 12 V, VOUT(NOM) = 5 V, COUT = 10 µF, CBYP(4) = 10 nF, BW = 10 Hz to 100 kHz 73
PSRR Power-supply rejection ratio VIN = 12 V, VOUT(NOM) = 5 V, COUT = 10 µF, CBYP(4) = 10 nF, f = 100 Hz 65 dB
TSD Thermal shutdown temperature Shutdown, temperature increasing 170 °C
Reset, temperature decreasing 150
(1) To ensure stability at no-load conditions, a current from the feedback resistive network greater than or equal to 10 µA is required.
(2) Maximum input voltage is limited to 24 V because of the package power dissipation limitations at full load (P ≈ (VIN – VOUT) × IOUT = (24 V – VREF) × 50 mA ≈ 1.14 W). The device is capable of sourcing a maximum current of 50 mA at higher input voltages as long as the power dissipated is within the thermal limits of the package plus any external heatsinking.
(3) IFB > 0 flows out of the device.
(4) CBYP refers to a bypass capacitor connected to the FB and OUT pins.