JAJSGI3B December   2011  – November 2018 TPS7A4101

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーションの図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable Pin Operation
      2. 7.3.2 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjustable Operation
      2. 8.1.2 Transient Voltage Protection
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Capacitor Recommendations
        2. 8.2.2.2 Input and Output Capacitor Requirements
        3. 8.2.2.3 Bypass Capacitor Requirements
        4. 8.2.2.4 Maximum AC Performance
        5. 8.2.2.5 Transient Response
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Thermal Considerations
      2. 10.1.2 Power Dissipation
      3. 10.1.3 Package Mounting
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

DGN Package
8-Pin HVSSOP
Top View
TPS7A4101 po_dgn_bvs162.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
OUT 1 O Regulator output. A capacitor greater than 4.7 µF must be tied from this pin to ground to assure stability.
FB 2 I This pin is the input to the control-loop error amplifier. This pin is used to set the output voltage of the device.
NC 3, 6, 7 — Not internally connected. This pin must either be left open or tied to GND.
GND 4 — Ground
EN 5 I This pin turns the regulator on or off.
If VEN ≥ VEN_HI the regulator is enabled.
If VEN ≤ VEN_LO, the regulator is disabled.
If not used, the EN pin can be connected to IN. Make sure that VEN ≤ VIN at all times.
IN 8 I Input supply
PowerPAD — — Solder to printed-circuit-board (PCB) to enhance thermal performance.
The PowerPAD is internally connected to GND.
Although the PowerPAD can be left floating, TI highly recommends connecting the PowerPAD to the GND plane.