JAJSK90B December   2020  – November 2022 TPS7A43

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 MID_OUT Voltage Selection
      2. 7.3.2 Precision Enable
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Current Limit
      5. 7.3.5 Thermal Shutdown
      6. 7.3.6 Power Good
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 MID_OUT Voltage Setting
      2. 8.1.2 Adjustable Device Feedback Resistors
      3. 8.1.3 Recommended Capacitor Types
      4. 8.1.4 Input and Output Capacitor Requirements
      5. 8.1.5 Power Dissipation (PD)
      6. 8.1.6 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Evaluation Modules
        2. 9.1.1.2 Spice Models
      2. 9.1.2 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.1.4 Input and Output Capacitor Requirements

An input capacitor is not required for stability except when the device maximum current is sourced from the MID_OUT pin. However, adding an input capacitor is always good analog design practice to counteract reactive input sources and improve transient response, input ripple, and PSRR. Starting with the nominal input capacitor value is required if large, fast transient load or line transients are anticipated on the MID_OUT pin or if the device is located several inches from the input power source.

A minimum of a 3:1 capacitor ratio between CMID_OUT and COUT is required for proper operation of the TPS7A43 LDO and a 4.7-μF capacitor can be connected from the MID_OUT pin to GND.

A minimum 1-μF output capacitor is required for VOUT stability. A maximum 100-μF output capacitor can be used as long as the 3:1 ratio between CMID_OUT and COUT is maintained.