JAJSK90B December   2020  – November 2022 TPS7A43

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 MID_OUT Voltage Selection
      2. 7.3.2 Precision Enable
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Current Limit
      5. 7.3.5 Thermal Shutdown
      6. 7.3.6 Power Good
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 MID_OUT Voltage Setting
      2. 8.1.2 Adjustable Device Feedback Resistors
      3. 8.1.3 Recommended Capacitor Types
      4. 8.1.4 Input and Output Capacitor Requirements
      5. 8.1.5 Power Dissipation (PD)
      6. 8.1.6 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Evaluation Modules
        2. 9.1.1.2 Spice Models
      2. 9.1.2 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.1.1 MID_OUT Voltage Setting

The MID_OUT voltage has three different output voltage levels (10 V, 12 V, and 15 V), as listed in Table 8-1, depending on the MVSEL1 and MVSEL2 pin voltage settings.

Table 8-1 MID_OUT Voltage Setting
SET VMVSEL1SET VMVSEL2MID_OUT
VMVSEL1 ≤ VMVSEL1(LOW)VMVSEL2 ≤ VMVSEL2(LOW)15 V
VMVSEL1 ≤ VMVSEL1(LOW)VMVSEL2 ≥ VMVSEL2(HIGH)12 V
VMVSEL1 ≥ VMVSEL1(HIGH)VMVSEL2 ≤ VMVSEL2(LOW)10 V
VMVSEL1 ≥ VMVSEL1(HIGH) VMVSEL2 ≥ VMVSEL2(HIGH) 12 V

For adjustable voltage options of the TPS7A43, and to maintain voltage regulation on the MID_OUT and OUT pins, the input voltage must be kept ≥ MID_OUT + VDO(MID_OUT). Additionally, to maintain regulation on the OUT pin, the MID_OUT voltage must be set ≥ VOUT(nom) + VDO(OUT).

Set the MVSEL1 and MVSEL2 voltages before enabling the device to set the MID_OUT voltage level; however, the MID_OUT voltage setting can be changed to a different level after the device had powered up. Do not allow these pins to float, instead tie them both to GND if not used to set VMID_OUT. When the device is powered while either of these pins are floating, the MID_OUT voltage is not set properly and might switch levels and cause damage to the device.