JAJSDJ7 August   2017 TPS7A47-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit (ICL)
      2. 7.3.2 Enable (EN) And Undervoltage Lockout (UVLO)
      3. 7.3.3 Soft-Start And Inrush Current
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 ANY-OUT Programmable Output Voltage
      2. 7.5.2 Adjustable Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Capacitor Recommendations
          1. 8.2.2.1.1 Input and Output Capacitor Requirements
          2. 8.2.2.1.2 Noise-Reduction Capacitor (CNR)
        2. 8.2.2.2 Dropout Voltage (VDO)
        3. 8.2.2.3 Output Voltage Accuracy
        4. 8.2.2.4 Startup
        5. 8.2.2.5 AC Performance
          1. 8.2.2.5.1 Power-Supply Rejection Ratio (PSRR)
          2. 8.2.2.5.2 Load Step Transient Response
          3. 8.2.2.5.3 Noise
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Power Dissipation (PD)
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Protection
    4. 10.4 Estimating Junction Temperature
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9 Power Supply Recommendations

The device is designed to operate from an input voltage supply range of 3 V to 35 V. If the input supply is noisy, additional input capacitors with low ESR can help improve the output noise performance.

9.1 Power Dissipation (PD)

Power dissipation must be considered in the PCB design. In order to minimize risk of device operation above 145°C, use as much copper area as available for thermal dissipation. Do not locate other power-dissipating devices near the LDO.

Power dissipation in the regulator depends on the input to output voltage difference and load conditions. Equation 7 calculates PD:

Equation 7. TPS7A47-Q1 q_pd_bvs204.gif

Power dissipation can be minimized, and thus greater efficiency achieved, by proper selection of the system voltage rails. Proper selection allows the minimum input voltage necessary for output regulation to be obtained.

The primary heat conduction path for the VQFN (RGW) package is through the PowerPAD to the PCB. The PowerPAD must be soldered to a copper pad area under the device. Thermal vias are recommended to improve the thermal conduction to other layers of the PCB.

The maximum power dissipation determines the maximum allowable junction temperature (TJ) for the device. According to Equation 8, power dissipation and junction temperature are most often related by the junction-to-ambient thermal resistance (θJA) of the combined PCB and device package and the temperature of the ambient air (TA).

Equation 8. TPS7A47-Q1 q_tj_bvs204.gif

Unfortunately, this thermal resistance (θJA) depends primarily on the heat-spreading capability built into the particular PCB design, and therefore varies according to the total copper area, copper weight, and location of the spreading planes. The θJA recorded in the Thermal Information table is determined by the JEDEC standard, PCB, and copper-spreading area and is to be used only as a relative measure of package thermal performance. For a well-designed thermal layout, θJA is actually the sum of the VQFN package junction-to-case (bottom) thermal resistance (θJCbot) plus the thermal resistance contribution by the PCB copper. By knowing θJCbot, the minimum amount of appropriate heat sinking can be used with Figure 27 to estimate θJA. θJCbot can be found in the Thermal Information table.

TPS7A47-Q1 tc_theta_ja_bvs136.gif

NOTE:

θJA value at a board size of 9-in2 (that is, 3-in × 3-in) is a JEDEC standard.
Figure 27. θJA vs Board Size