JAJSDJ7 August   2017 TPS7A47-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit (ICL)
      2. 7.3.2 Enable (EN) And Undervoltage Lockout (UVLO)
      3. 7.3.3 Soft-Start And Inrush Current
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 ANY-OUT Programmable Output Voltage
      2. 7.5.2 Adjustable Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Capacitor Recommendations
          1. 8.2.2.1.1 Input and Output Capacitor Requirements
          2. 8.2.2.1.2 Noise-Reduction Capacitor (CNR)
        2. 8.2.2.2 Dropout Voltage (VDO)
        3. 8.2.2.3 Output Voltage Accuracy
        4. 8.2.2.4 Startup
        5. 8.2.2.5 AC Performance
          1. 8.2.2.5.1 Power-Supply Rejection Ratio (PSRR)
          2. 8.2.2.5.2 Load Step Transient Response
          3. 8.2.2.5.3 Noise
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Power Dissipation (PD)
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Protection
    4. 10.4 Estimating Junction Temperature
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

RGW Package
5-mm × 5-mm, 20-Pin VQFN
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
0P1V 12 I When connected to GND, this pin adds 0.1 V to the nominal output voltage of the regulator.
Do not connect any voltage other than GND to this pin. If not used, leave this pin floating.
0P2V 11 I When connected to GND, this pin adds 0.2 V to the nominal output voltage of the regulator.
Do not connect any voltage other than GND to this pin. If not used, leave this pin floating.
0P4V 10 I When connected to GND, this pin adds 0.4 V to the nominal output voltage of the regulator.
Do not connect any voltage other than GND to this pin. If not used, leave this pin floating.
0P8V 9 I When connected to GND, this pin adds 0.8 V to the nominal output voltage of the regulator.
Do not connect any voltage other than GND to this pin. If not used, leave this pin floating.
1P6V 8 I When connected to GND, this pin adds 1.6 V to the nominal output voltage of the regulator.
Do not connect any voltage other than GND to this pin. If not used, leave this pin floating.
3P2V 6 I When connected to GND, this pin adds 3.2 V to the nominal output voltage of the regulator.
Do not connect any voltage other than GND to this pin. If not used, leave this pin floating.
6P4V1 5 I When connected to GND, this pin adds 6.4 V to the nominal output voltage of the regulator.
Do not connect any voltage other than GND to this pin. If not used, leave this pin floating.
6P4V2 4 I When connected to GND, this pin adds 6.4 V to the nominal output voltage of the regulator.
Do not connect any voltage other than GND to this pin. If not used, leave this pin floating.
EN 13 I Enable pin. The device is enabled when the voltage on this pin exceeds the maximum enable voltage, VEN(HI). If enable is not required, tie EN to IN.
GND 7 — Ground
IN 15, 16 I Input supply. A capacitor greater than or equal to 1 µF must be tied from this pin to ground to assure stability.
A 10-µF capacitor is recommended to be connected from IN to GND (as close to the device as possible) to reduce circuit sensitivity to printed circuit board (PCB) layout, especially when long input traces or high source impedances are encountered.
NC 2, 17-19 — This pin can be left open or tied to any voltage between GND and IN.
NR 14 — Noise-reduction pin. When a capacitor is connected from this pin to GND, RMS noise can be reduced to very low levels. A capacitor greater than or equal to 10 nF must be tied from this pin to ground to assure stability. A 1-µF capacitor is recommended to be connected from NR to GND (as close to the device as possible) to maximize ac performance and minimize noise.
OUT 1, 20 O Regulator output. A capacitor greater than or equal to 10 µF must be tied from this pin to ground to assure stability. A 47-µF ceramic output capacitor is highly recommended to be connected from OUT to GND (as close to the device as possible) to maximize ac performance.
SENSE/FB 3 I Control-loop error amplifier input.
This pin is the SENSE pin if the device output voltage is programmed using ANY-OUT (no external feedback resistors). This pin must be connected to OUT. Connect this pin to the point of load to maximize accuracy.
This pin is the FB pin if the device output voltage is set using external resistors. See the Adjustable Operation Adjustable Operation section for more details.
PowerPAD Pad — Connect the PowerPAD to a large-area ground plane. The PowerPAD™ is internally connected to GND.