JAJSQ32A August   2023  – January 2024 TPS7A53B

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Voltage Regulation Features
        1. 6.3.1.1 DC Regulation
        2. 6.3.1.2 AC and Transient Response
      2. 6.3.2 System Start-Up Features
        1. 6.3.2.1 Programmable Soft-Start (NR/SS Pin)
        2. 6.3.2.2 Internal Sequencing
          1. 6.3.2.2.1 Enable (EN)
          2. 6.3.2.2.2 Undervoltage Lockout (UVLO) Control
          3. 6.3.2.2.3 Active Discharge
        3. 6.3.2.3 Power-Good Output (PG)
      3. 6.3.3 Internal Protection Features
        1. 6.3.3.1 Foldback Current Limit (ICL)
        2. 6.3.3.2 Thermal Protection (Tsd)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Regulation
      2. 6.4.2 Disabled
      3. 6.4.3 Current Limit Operation
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1  Recommended Capacitor Types
        1. 7.1.1.1 Input and Output Capacitor Requirements (CIN and COUT)
        2. 7.1.1.2 Noise-Reduction and Soft-Start Capacitor (CNR/SS)
        3. 7.1.1.3 Feed-Forward Capacitor (CFF)
      2. 7.1.2  Soft-Start and Inrush Current
      3. 7.1.3  Optimizing Noise and PSRR
      4. 7.1.4  Charge Pump Noise
      5. 7.1.5  Current Sharing
      6. 7.1.6  Adjustable Operation
      7. 7.1.7  Power-Good Operation
      8. 7.1.8  Undervoltage Lockout (UVLO) Operation
      9. 7.1.9  Dropout Voltage (VDO)
      10. 7.1.10 Device Behavior During Transition From Dropout Into Regulation
      11. 7.1.11 Load Transient Response
      12. 7.1.12 Reverse Current Protection Considerations
      13. 7.1.13 Power Dissipation (PD)
      14. 7.1.14 Estimating Junction Temperature
      15. 7.1.15 TPS7A53EVM Thermal Analysis
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Board Layout
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

at TA = 25°C, VIN = 1.4V or VIN = VOUT(NOM) + 0.5V (whichever is greater), VBIAS = open, VOUT(NOM) = 0.5V, VEN = 1.1V, COUT = 47µF, CNR/SS = 0nF, CFF = 0nF, and PG pin pulled up to VIN with 100kΩ (unless otherwise noted)

GUID-20231115-SS0I-9ZWL-MNJS-DXXH1KLB7CRB-low.svg
VIN = 1.1V, VOUT = 0.7V, VBIAS = 5V, COUT = 47µF || 10µF || 10µF, CNR/SS = 10nF, CFF = 10nF
Figure 5-1 PSRR vs Frequency and IOUT
GUID-20231115-SS0I-LCFF-BWQS-LFQLXF258KJN-low.svg
VIN = 1.4V, IOUT = 1A, COUT = 47µF || 10µF || 10µF, CNR/SS = 10nF, CFF = 10nF
Figure 5-3 PSRR vs Frequency and VBIAS
GUID-20231115-SS0I-QRHW-DPVK-MC8MKTH45C72-low.svg
VIN = VOUT + 0.4V, VBIAS = 5.0V, COUT = 47µF || 10µF || 10µF, CNR/SS = 10nF, CFF = 10nF
Figure 5-5 PSRR vs Frequency and VOUT With Bias
GUID-20231116-SS0I-HLLR-NCSC-CTG0JS88QT5G-low.svg
VIN = 5.6V, COUT = 47µF || 10µF || 10µF, CNR/SS = 10nF, CFF = 10nF
 
Figure 5-7 PSRR vs Frequency and IOUT for VOUT = 5V
GUID-20231121-SS0I-NNGG-GQLW-XG6L1NLQ2CJK-low.png
VIN = VOUT + 0.4V and VBIAS = 5V for VOUT ≤ 2.2V, IOUT = 3A, COUT = 47µF || 10µF || 10µF, CNR/SS = 10nF, CFF = 10nF, RMS noise BW = 10Hz to 100kHz
Figure 5-9 Output Voltage Noise vs Frequency and VOUT
GUID-20231121-SS0I-6BH8-95K1-LVMZXMCT03CX-low.svg
VIN = VOUT + 0.4V, VBIAS = 5V, IOUT = 3A, COUT = 47µF || 10µF || 10µF, CFF = 10nF, RMS noise BW = 10Hz to 100kHz
 
Figure 5-11 Output Voltage Noise vs Frequency and CNR/SS
GUID-20231121-SS0I-GK5M-N28F-V8QRMNCKGV6L-low.svg
VIN = 5.6V, IOUT = 3A, COUT = 47µF || 10µF || 10µF, CFF = 10nF, RMS noise BW = 10Hz to 100kHz
Figure 5-13 Output Voltage Noise vs Frequency at 5V Output
GUID-20231115-SS0I-FJZZ-3HXL-MBCM7HFXT6NS-low.svg
VIN = VOUT + 0.4V, VBIAS = 5V, IOUT, DC = 100mA, slew rate = 1A/µs, CNR/SS = CFF = 10nF, COUT = 47µF || 10µF || 10µF
Figure 5-15 Load Transient vs Time and VOUT With Bias
GUID-20231115-SS0I-JZF8-VQLP-L9KSR6GNGQ7L-low.svg
VOUT = 5V, IOUT, DC = 100mA, IOUT = 100mA to 3A, COUT = 47µF || 10µF || 10µF, CNR/SS = CFF = 10nF
Figure 5-17 Load Transient vs Time and Slew Rate
GUID-20231116-SS0I-NKPG-FPZC-ZHDGNHWSXXBQ-low.svg
IOUT = 3A, VBIAS = 0V
Figure 5-19 Dropout Voltage vs Input Voltage Without Bias
GUID-20231115-SS0I-LRDC-14J6-MNQJFSG4Z5KB-low.svg
VIN = 1.4V, VBIAS = 0V
Figure 5-21 Dropout Voltage vs Output Current Without Bias
GUID-20231115-SS0I-9STN-BPDD-KWDHVNQRQBJ1-low.svg
VIN = 5.5V
Figure 5-23 Dropout Voltage vs Output Current (High VIN)
GUID-20231115-SS0I-TGZN-0CPF-8BX1MFMXNL9S-low.svg
VIN = 1.4V
Figure 5-25 Load Regulation Without Bias
GUID-20231115-SS0I-QRPF-7W25-CQLMSZVNTKLH-low.svg
VOUT = 0.5V, IOUT = 5mA
Figure 5-27 Line Regulation Without Bias
GUID-20231227-SS0I-KXZ7-PKDZ-9K18VJ07CBHV-low.svg
VIN = 1.1V, IOUT = 5mA
Figure 5-29 Quiescent Current vs Bias Voltage
GUID-20231227-SS0I-N95G-NQBK-CFJDLD5QJWBR-low.svg
VIN = 1.1V
Figure 5-31 Shutdown Current vs Bias Voltage
GUID-20231115-SS0I-J4VS-KQDL-BV1SXNBSHWVF-low.svg
 
Figure 5-33 VIN UVLO vs Temperature
GUID-20231207-SS0I-JWVR-DCGN-QFGX00C18B1K-low.svg
VIN = 1.4V, 6.5V
Figure 5-35 Enable Threshold vs Temperature
GUID-20231115-SS0I-ZL6X-SDGG-B9QR6NHZKZR4-low.svg
VIN = 6.5V
Figure 5-37 PG Voltage vs PG Current Sink Without Bias
GUID-20231121-SS0I-XKQC-H3ZV-B8P9ZSS9WDC9-low.svg
VIN = 1.1V, VBIAS = 3V
Figure 5-39 Foldback Current Limit vs Temperature
GUID-20231115-SS0I-C8BM-T7ZM-07KJRM0B29X3-low.svg
VBIAS = 5V, COUT = 47µF || 10µF || 10µF, CNR/SS = 10nF, CFF = 10nF
Figure 5-2 PSRR vs Frequency and VIN With Bias
GUID-20231115-SS0I-KWGF-BZHC-J00KBXNPHH4Z-low.svg
IOUT = 1A, COUT = 47µF || 10µF || 10µF, CNR/SS = 10nF, CFF = 10nF
Figure 5-4 PSRR vs Frequency and VIN
GUID-20231115-SS0I-NDPC-X6LP-ZWZ3W2ZW8LKK-low.svg
IOUT = 3A, COUT = 47µF || 10µF || 10µF, CNR/SS = 10nF, CFF = 10nF
Figure 5-6 PSRR vs Frequency and VIN for VOUT = 3.3V
GUID-20231121-SS0I-WW45-ZZ39-BDFKPH25C6ST-low.svg
VIN = VOUT + 0.4V and VBIAS = 5V for VOUT ≤ 2.2V, COUT = 47µF || 10µF || 10µF, CNR/SS = CFF = 10nF, RMS noise BW = 10Hz to 100kHz
Figure 5-8 Output Voltage Noise vs Output Voltage and IOUT
GUID-20231121-SS0I-4C9S-DGFB-8RNRDWS0P5SH-low.svg
IOUT = 1A, COUT = 47µF || 10µF || 10µF, CNR/SS = 10nF, CFF = 10nF, RMS noise BW = 10Hz to 100kHz
 
Figure 5-10 Output Voltage Noise vs Frequency and VIN
GUID-20231121-SS0I-GZM4-TN3C-WBGPP2VSRXGQ-low.svg
VIN = 1.1V, VOUT = 0.7V, VBIAS = 5V, IOUT = 3A, COUT = 47µF || 10µF || 10µF, CNR/SS = 10nF, RMS noise BW = 10Hz to 100kHz
Figure 5-12 Output Voltage Noise vs Frequency and CFF
GUID-20231115-SS0I-HB3S-FBVP-8LDFJ2QTZ8KS-low.svg
VIN = 1.1V, VOUT = 0.7V, VBIAS = 5.0V, IOUT = 3A, COUT = 47µF || 10µF || 10µF
Figure 5-14 Start-Up Waveform vs Time and CNR/SS
GUID-20231115-SS0I-8Z2V-Q4TG-DBKGPHN70FDK-low.svg
IOUT, DC = 100mA, COUT = 47µF || 10µF || 10µF, CNR/SS = CFF = 10nF, slew rate = 1A/µs
Figure 5-16 Load Transient vs Time and VOUT Without Bias
GUID-20231115-SS0I-GPSF-BPP8-F50ZXGDQCP6S-low.svg
VIN = 1.4V, VBIAS = 5.0V, COUT = 47µF || 10µF || 10µF, CNR/SS = CFF = 10nF, slew rate = 1A/µs
Figure 5-18 Load Transient vs Time and DC Load (VOUT = 0.7V)
GUID-20231116-SS0I-XCX1-VSLH-QDTLPD3TXNBK-low.svg
IOUT = 3A, VBIAS = 6.5V
Figure 5-20 Dropout Voltage vs Input Voltage With Bias
GUID-20240115-SS0I-9JBV-PK92-PMTMLCFDGKGC-low.svg
VIN = 1.1V, VBIAS = 3V
Figure 5-22 Dropout Voltage vs Output Current With Bias
GUID-20231227-SS0I-HW4F-HVZ9-KTHQ15XP9GGG-low.svg
VIN = 1.1V, VBIAS = 3.0V
Figure 5-24 Load Regulation With Bias
GUID-20231115-SS0I-FHLF-1ZKP-ZGBKXWX8S9PZ-low.svg
VIN = 5.5V, VOUT = 5.15V, VBIAS = 0V
Figure 5-26 Load Regulation Without Bias
GUID-20231115-SS0I-17T1-GLXN-7BQPJLWB75JB-low.svg
VBIAS = 0V, IOUT = 5mA
Figure 5-28 Quiescent Current vs Input Voltage
GUID-20231115-SS0I-46XT-JDD2-BMZ3WFXLTNTX-low.svg
VBIAS = 0V
Figure 5-30 Shutdown Current vs Input Voltage
GUID-20240115-SS0I-S1FX-PJF6-8N8SVJBB1T9H-low.svg
VBIAS = 0V
Figure 5-32 NR/SS Current vs Input Voltage
GUID-49C3EC17-5FD7-47F9-BF52-2F483DFDB914-low.gif
VIN = 1.1V
Figure 5-34 VBIAS UVLO vs Temperature
GUID-20231115-SS0I-HRFJ-FQL3-XFZMCVTQKNWC-low.svg
 
Figure 5-36 PG Voltage vs PG Current Sink
GUID-F9F76D90-FB60-4EC9-B361-03BCFC9E3738-low.gif
 
Figure 5-38 PG Threshold vs Temperature