JAJSFH9J March   2010  – March 2020 TPS7A60-Q1 , TPS7A61-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      プログラム可能なリセット遅延オプション
      2.      イネーブル・オプション
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Reset Delay and Reset Output
      2. 8.3.2 Charge Pump Operation
      3. 8.3.3 Undervoltage Shutdown
      4. 8.3.4 Low-Voltage Tracking
      5. 8.3.5 Integrated Fault Protection
      6. 8.3.6 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Low-Power Mode
      2. 8.4.2 Sleep Mode (TPS7A61-Q1 Only)
      3. 8.4.3 Regulation Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 TPS7A60-Q1 Typical Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Input Capacitor
          2. 9.2.1.2.2 Output Capacitor
        3. 9.2.1.3 Application Curve
      2. 9.2.2 TPS7A61-Q1 Typical Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Power Dissipation and Thermal Considerations
    2. 11.2 Layout Examples
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 関連リンク
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.1 Overview

The TPS7A60-Q1 and TPS7A61-Q1 devices comprise a family of monolithic low-dropout linear voltage regulators with integrated reset functionality. These voltage regulators are designed for low power consumption and quiescent current less than 25 µA in light-load applications. These devices are well-suited in power supplies for microprocessors and microcontrollers because of an integrated reset delay, also called power-on-reset delay.

These devices are available in two fixed output-voltage (3.3-V and 5-V) versions as follows:

  • Programmable reset delay version (TPS7A60-Q1)
  • Enable version (TPS7A61-Q1)