JAJSFH8G June   2011  – March 2020 TPS7A63-Q1 , TPS7A6401-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      固定出力電圧オプション
      2.      可変出力電圧オプション
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1  Power Up, Reset Delay, and Reset Output
      2. 7.3.2  Adjustable Output Voltage
      3. 7.3.3  Chip Enable
      4. 7.3.4  Charge Pump Operation
      5. 7.3.5  Low-Power Mode
      6. 7.3.6  Undervoltage Shutdown
      7. 7.3.7  Low-Voltage Tracking
      8. 7.3.8  Integrated Fault Protection
      9. 7.3.9  Thermal Shutdown
      10. 7.3.10 Integrated Window Watchdog
        1. 7.3.10.1 Programmable-Window Watchdog
        2. 7.3.10.2 Watchdog Enable
        3. 7.3.10.3 Watchdog Service Signal
        4. 7.3.10.4 Watchdog Fault Outputs
        5. 7.3.10.5 Watchdog Initialization
        6. 7.3.10.6 Watchdog Operation
        7. 7.3.10.7 Watchdog Fault Conditions
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VIN Lower Than 4 V
      2. 7.4.2 Operation With VIN Larger Than 4 V
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Example
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Application Using the TPS7A6333-Q1 or TPS7A6350-Q1
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Application Using the TPS7A6401-Q1
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power Dissipation and Thermal Considerations
        1. 10.1.1.1 Example
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 関連リンク
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Programmable-Window Watchdog

Program the duration of the watchdog window by connecting an external resistor (ROSC) to ground at the ROSC pin. The current through the resistor sets the clock frequency of the internal oscillator. The user can adjust the duration of the watchdog window (that is, the watchdog timer period) by changing the resistor value. The duration of the watchdog window and the duration of the fault output are multiples of the internal oscillator frequency and are given by the following equations:

Equation 4. tWD = 10–6 × ROSC = 5000 × 1 / fOSC
Equation 5. tWD_OUT = 1 / fOSC
Equation 6. tCW = tOW = 1 / 2 tWD

where

  • tWD = width of watchdog window
  • ROSC = resistor connected at ROSC pin
  • tWD_OUT = duration of fault output
  • fOSC = frequency of internal oscillator
  • tCW = duration of closed window
  • tOW = duration of open window

As shown in Figure 22, each watchdog window consists of an open window and a closed window, each having a width approximately 50% of the watchdog window. However, there is an exception to this; the first open window after watchdog initialization is eight times the duration of the watchdog window. All open windows except the one after watchdog initialization are one-half the width of the watchdog window. On initialization, the watchdog must receive service (by software, external microcontroller, and so forth) only during an open window. A watchdog serviced during a closed window, or not serviced during a open window, creates a watchdog fault condition.

TPS7A63-Q1 TPS7A6401-Q1 window_lvsab1.gifFigure 22. Watchdog Window Duration