JAJSFH8G June   2011  – March 2020 TPS7A63-Q1 , TPS7A6401-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      固定出力電圧オプション
      2.      可変出力電圧オプション
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1  Power Up, Reset Delay, and Reset Output
      2. 7.3.2  Adjustable Output Voltage
      3. 7.3.3  Chip Enable
      4. 7.3.4  Charge Pump Operation
      5. 7.3.5  Low-Power Mode
      6. 7.3.6  Undervoltage Shutdown
      7. 7.3.7  Low-Voltage Tracking
      8. 7.3.8  Integrated Fault Protection
      9. 7.3.9  Thermal Shutdown
      10. 7.3.10 Integrated Window Watchdog
        1. 7.3.10.1 Programmable-Window Watchdog
        2. 7.3.10.2 Watchdog Enable
        3. 7.3.10.3 Watchdog Service Signal
        4. 7.3.10.4 Watchdog Fault Outputs
        5. 7.3.10.5 Watchdog Initialization
        6. 7.3.10.6 Watchdog Operation
        7. 7.3.10.7 Watchdog Fault Conditions
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VIN Lower Than 4 V
      2. 7.4.2 Operation With VIN Larger Than 4 V
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Example
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Application Using the TPS7A6333-Q1 or TPS7A6350-Q1
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Application Using the TPS7A6401-Q1
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power Dissipation and Thermal Considerations
        1. 10.1.1.1 Example
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 関連リンク
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Watchdog Fault Conditions

TPS7A63-Q1 TPS7A6401-Q1 v_flt_2_lvsab1.gifFigure 25. Watchdog Service Fault Conditions for TPS7A63-Q1
TPS7A63-Q1 TPS7A6401-Q1 v_flg_2_lvsab1.gifFigure 26. Watchdog Service Fault Conditions for TPS7A6401-Q1

For both device options, a watchdog fault condition occurs in following (non-exhaustive) cases:

  • When the watchdog receives service during a closed window.
  • When watchdog does not receive service during an open window (this open window could be the one after watchdog initialization, or the one following a closed window).

As shown in Figure 25, for TPS7A63-Q1 the first watchdog fault registers when the watchdog receives service during a closed window. This causes the watchdog fault pin (WD_FLT) to go low temporarily for a duration of tWD_OUT. Following the fault, the watchdog reinitializes. Likewise, the second fault registers when the watchdog does not receive service during an open window (following a closed window). Again, the fault pin (WD_FLT) is asserts low for a duration of tWD_OUT.

As shown in Figure 26, for TPS7A6401-Q1 the first watchdog fault registers when watchdog receives service during a closes window. This causes the watchdog flag pin (WD_FLAG) to become high and stay latched. At the same time, nRST pin goes low temporarily for the duration of tWD_OUT. WD_FLAG remains high until toggling the nWD_EN pin disables and re-enables the watchdog or the watchdog receives service properly (while nWD_EN is low and nRST is high). The second fault registers when the watchdog does not receive service during an open window (following a closed window). While WD_FLAG is high (that is, during a fault condition), if the watchdog stays enabled, and reset is high; a watchdog service signal can also bring WD_FLAG low (about 5 µs after the watchdog receives service).

TPS7A63-Q1 TPS7A6401-Q1 v_flt_3_lvsab1.gifFigure 27. Watchdog Fault During Initialization, and Reinitialization During Reset for TPS7A63-Q1
TPS7A63-Q1 TPS7A6401-Q1 v_flg_3_lvsab1.gifFigure 28. Watchdog Fault During Initialization, and Reinitialization During Reset for TPS7A6401-Q1

As shown in Figure 27 for the TPS7A6401-Q1, the watchdog fault condition also occurs if the watchdog does not receive service during the open window after watchdog initialization. That is, if the watchdog does not receive service during the first 8× tWD_OUT period after initialization, a fault condition occurs. This causes the watchdog fault pin (WD_FLT) to go low temporarily for a duration of tWD_OUT. In case of a load transient, if the regulated output voltage drops down causing reset (nRST) to go low, the rising edge on nRST causes the watchdog to reinitialize (that is, when reset becomes high with the watchdog still enabled). During a fault condition (that is, WD_FLT is low) with the watchdog disabled, the fault output continues to stay low until tWD_OUT is elapsed. A falling edge on nWD_EN pin causes the watchdog to reinitialize while nRST is still high.

As shown in Figure 28 for the TPS7A6401-Q1, the watchdog fault condition also occurs if the watchdog does not receive service during the open window after watchdog initialization. That is, if the watchdog does not receive service in first 8× tWD_OUT period after initialization, a fault condition occurs. This causes the watchdog flag pin (WD_FLAG) to become high and stay latched. At the same time, the nRST pin goes low temporarily for a duration of tWD_OUT. In the case of a load transient, if the regulated output voltage drops down causing the reset output to go low, the WD_FLAG asserts low, and the rising edge on nRST causes the watchdog to reinitialize (while the watchdog remains enabled). During a fault condition (that is, WD_FLAG is high), and with a disabled watchdog, the flag output continues to stay high as long as the watchdog remains enabled or receives proper service. However, nRST stays low until tWD_OUT elapses. Re-enabling the watchdog causes watchdog to reinitialize (while nRST is still high).